EP0446490A1
Expired / Lapsed
EP
⏱️ 0.0 years remaining
Switching converter
Assignee: Nokia Bell NV
•
Filing: 1990-03-12
•
Granted: —
•
Expires: 2010-03-12
Abstract
Abstract The switching converter mainly includes a duty cycle controller (DCC) whose output controls a switch (T1) for transferring energy from an input (VIN) to an output (VOUT). DCC includes a sawtooth generator (ST) and a pulse generator (NL) whose output signals (STO, NLO) are OR-ed and then compared with an error voltage (VE), derived from the output voltage (VOUT) and a reference voltage (VREF1), so as to produce an output signal the duty cycle of which linearly varies from a predetermined non-zero value onwards, thus ensuring that during each cycle T1 is activated for a minimum duration.
Inventors
- 👤 Eddie Louis Marie Willocx
- 👤 Elve Desiderius Jozef Moons
Bibliographic Details
Application Number
—
Jurisdiction
EP
Data Source
google_patents
Last Synchronized
2026-10-31 10:47
CPC Classifications
H; H02; H02M; H02M3/00; H02M3/22; H02M3/24; H02M3/28; H02M3/325; H02M3/335; H02M3/33507
Claims Analysis
Total Claims: 5
Claim 1
Independent Claim
113 words
Switching converter (SPC) including a switch (T1) for allowing transfer of electric energy from an input (VIN) to an output (VOUT), an error amplifier (EA) for deriving an error signal (VE) from the difference between the signal at said output (VOUT) and a reference signal (VREF1), and a duty cycle controller (DCC) wherein the ON/OF periods of a clock signal (CLK) are modified in function of said error signal (VE) and control said switch (T1), characterized in that said duty cycle controller (DCC) includes a pulse generator (NL) by which said switch (T1) is switched ON during at least a predetermined fraction greater than zero of each of said clock signal (CLK) periods.
Claim 2
Dependent Claim
112 words
Switching converter (SPC) according to claim 1, characterized in that said duty cycle controller (DCC) further includes a sawtooth signal (STO) generator (ST) which produces during each of said clock periods a sawtooth signal reaching a predetermined peak amplitude smaller than that of the pulse signal (NLO) produced at the start of each of said ON periods by said pulse generator (NL), a gating circuit (MST) for OR-ing said sawtooth signal (STO) with said pulse signal (NLO) and a comparator cirucit (CP1) comparing the output signal (MSTO) of said gating circuit (MST) with said error signal (VE) and producing a digital output signal (VD) for controlling the operation of said switch (T1).
Claim 3
Dependent Claim
100 words
Switching converter (SPC) according to claim 2, characterized in that said sawtooth generator includes a capacitor (C2) coupled in series with a constant current source (CS2) for charging said capacitor (C2), a transistor (T2) controlled by said clock signal (CLK) and coupled in parallel with said capacitor (C2) for discharging it, and a variable impedance (T3) in parallel with said capacitor (C2) for partially deviating the current of said current source in function of the output signal of a second comparator (CP2) comparing said sawtooth signal and a second reference voltage (VREF2) to which said peak amplitude is made equal.
Claim 4
Dependent Claim
86 words
Switching converter (SPC) according to claim 3, characterized in that said variable impedance is the drain-to-source path of a second transistor, the gate-to-source path of which is shunted by a second capacitor (C3) coupled in series with a controlled second constant current source (CS3) for charging said second capacitor (C3) and coupled in parallel with a third constant current source (CS4) for discharging said second capacitor (C3), said second current source being switched ON and OFF by said output signal of said second comparator circuit (CP2).
Claim 5
Dependent Claim
150 words
Switching converter (SPC) according to claim 1, characterized in that it further includes a driver circuit (DR), the input (VD) of which is coupled to the output (VD) of said duty cycle controller (DCC) and the output (VG) of which controls said switch, said switch being a transistor (T1) forming part of an input circuit having said input (VIN) and being coupled in series with a resistor (R) across which a voltage proportional to the current through said transistor is sensed, said driver circuit including between its input (VD) and output (VG) a series connection of a capacitor (C5) and an amplifier (A), a third comparator comparing said voltage sensed across said resistor (R) with a reference voltage (VREF3), the output of said comparator controlling the gate of another transistor (T6) whose drain-to-source path short-circuits the input of said amplifier (A) when said sensed voltage exceeds said reference voltage (VREF3).
References Cited (Backward Citations)
US3733519A
Cited
GB2005496A
Cited
USPTO Annuity & Maintenance Windows
Maintenance schedule is calculated for granted US utility patents.