Patent JPS5364472A successfully refreshed from Google Patents.
Patent EP0643479A1 successfully refreshed from Google Patents.
EP0643479A1
Expired / Lapsed
EP
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Preamplifier circuit arrangements
Assignee: Microchip Technology Caldicot Ltd
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Filing: 1994-09-07
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Granted: —
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Expires: 2014-09-07
Abstract
Abstract A preamplifier circuit arrangement for a magnetic or magneto resistive transducer, such as a record/replay head, in which a cascode preamplifier stage, and a stage providing a floating reference voltage for a following amplifier, are linked by an emitter coupled pair of transistors, one in each stage, such that the d.c. currents in the two stages flow in common through the transducer.
Inventors
- 👤 Richard Davies
Bibliographic Details
Application Number
—
Jurisdiction
EP
Data Source
google_patents
Last Synchronized
2026-11-05 21:14
CPC Classifications
H; H03; H03F; H03F3/00; H03F3/72; H03F1/00; H03F1/08; H03F1/22; G; G11; G11B; G11B19/00; G11B19/02; G11B5/00; G11B2005/0002; G11B2005/0005; G11B2005/001; G11B2005/0013; G11B2005/0016; G11B2005/0018; G11B33/00; G11B33/14
Claims Analysis
Total Claims: 4
Claim 1
Independent Claim
107 words
A preamplifier circuit arrangement for a magnetic or magneto resistive transducer or record/replay head comprising an emitter-coupled pair of transistors having respective constant current sources in their collector circuits and bias circuit means to apply d.c. biases to their respective bases, means to connect said transducer or record-replay head between said coupled emitters and a point of ground potential, and means to connect one of said pair of transistors in common base mode to alternating signal currents flowing in said transducer or record/replay head, the arrangment being such that alternating output signals may be derived from the collector circuit or said one of said pair of transistors.
Claim 2
Dependent Claim
122 words
A preamplifier circuit arrangement for any selected one of a plurality of magnetic or magneto resistive transducer or record/replay head comprising an emitter-coupled pair of transistors having respective constant current sources in their collector circuits and bias circuit means to apply d.c. biases to their respective bases, respective switching means selectively to connect any one of said transducers or record/display heads between said coupled emitters and a point of ground potential, and means to connect one of said pair of transistors in common base mode to alternating signal currents flowing in said one of said transducers or record/replay heads, the arrangement being such that alternating output signals may be derived from the collector circuit of said one of said pair of transistors.
Claim 3
Dependent Claim
30 words
A preamplifier circuit in accordance with Claim 2 wherein said switching means comprises a respective switching transistor connected between said coupled emitters and each of said transducers or record/replay heads.
Claim 4
Dependent Claim
35 words
A preamplifier circuit in accordance with Claim 1, Claim 2 or Claim 3 wherein the collector circuits of said emitter-coupled pair of transistors are coupled to respective inputs of an amplifier providing differential output signals.
References Cited (Backward Citations)
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