Patent EP0628993A2 successfully refreshed from Google Patents.
EP0628993A2
Expired / Lapsed
EP
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A method for selective removal of hard trench masks
Assignee: Texas Instruments Inc
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Filing: 1994-06-09
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Granted: —
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Expires: 2014-06-09
Abstract
Abstract After trench formation on a semiconductor wafer (14) using a hard trench mask containing a phosphosilicate glass top layer and an underlying thermal oxide layer, the phosphosilicate glass layer may be removed without substantially etching the thermal oxide layer. The wafer temperature is increased to at least 40°C (36) prior to etching with an HF/H₂O vapor (40-44).
Inventors
- 👤 Man Wong
Bibliographic Details
Application Number
—
Jurisdiction
EP
Data Source
google_patents
Last Synchronized
2026-11-09 10:01
CPC Classifications
H; H10; H10P; H10P50/00; H10P50/20; H10P50/28; H10P50/282; H10P50/283; H10W; H10W72/00; H10W72/071; H10W72/0711; H10W72/07141; H10W72/075; H10W72/07521; H10W72/851; H10W72/874; H10W72/884; H10W90/00; H10W90/701; H10W90/731; H10W90/736; H10W90/751; H10W90/756
Claims Analysis
Total Claims: 10
Claim 1
Independent Claim
41 words
A method for removing a hard trench mask after trench formation on a wafer, comprising the steps of: raising the temperature of the wafer to a predetermined setting; generating an etchant vapor; and exposing the wafer to said generated etchant vapor.
Claim 2
Dependent Claim
36 words
The method as set forth in claim 1, wherein said removing a hard trench mask comprises removing a phosphosilicate glass formation by etching from an oxide formation on said wafer without substantially etching said oxide formation.
Claim 3
Dependent Claim
35 words
The method as set out in claim 1, wherein removing said hard trench mask comprises removing a borophosphorosilicate glass formation by etching from an oxide formation on said wafer without substantially removing said oxide formation.
Claim 4
Independent Claim
27 words
The method, as set forth in any preceding claim, wherein said wafer temperature raising step includes the step of raising the wafer temperature between 40° and 50°C.
Claim 5
Independent Claim
31 words
The method, as set forth in any preceding claim, further comprising the steps of: enclosing the wafer within a reactor chamber; and decreasing the reactor chamber pressure to a predetermined setting.
Claim 6
Independent Claim
21 words
The method as set out in any preceding claim, wherein the step of generating the etchant comprises generating an HF/H₂O vapor
Claim 7
Dependent Claim
34 words
The method, as set forth in claim 5, wherein said HF/H₂O vapor generating step comprises the step of passing an inert carrier gas at a first predetermined rate over an azeotropic solution of HF/H₂O.
Claim 8
Dependent Claim
31 words
The method, as set forth in claim 5 or claim 6, wherein said exposing steps comprise the step of: passing said HF/H₂O vapor over the wafer at a second predetermined rate.
Claim 9
Independent Claim
25 words
The method, as set forth in any preceding claim, further comprising an over-etching step for achieving uniformity and total removal of said hard trench mask.
Claim 10
Dependent Claim
14 words
A semiconductor device formed from the method as set forth in any preceding claim.
References Cited (Backward Citations)
No citation records indexed.
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