EP0613245A1
Expired / Lapsed
EP
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Digital phase shifter
Assignee: Advanced Micro Devices Inc
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Filing: 1993-11-17
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Granted: —
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Expires: 2013-11-17
Abstract
Abstract An all digitally controlled self calibrating delay line method and apparatus which simulates an infinitely long delay line by continuously identifying the terminal at a physical position in said delay line (ESP) which is the exact location at which a signal traversing said delay line is phase shifted 360 degrees in relation to said phase detector input and means for connecting the said ECP terminal to the first stage of said delay line.
Inventors
- 👤 Bin Guo
Bibliographic Details
Application Number
—
Jurisdiction
EP
Data Source
google_patents
Last Synchronized
2026-10-27 15:06
CPC Classifications
H; H03; H03L; H03L7/00; H03L7/06; H03L7/08; H03L7/081; H03L7/0812; H03L7/0814; H03K; H03K5/00; H03K5/13; H03K5/131; H04; H04L; H04L7/00; H04L7/02; H04L7/033; H04L7/0337
Claims Analysis
Total Claims: 10
Claim 1
Independent Claim
159 words
A digitally controlled phase shifting method for providing a continuously adjustable increasing or decreasing phase by simulating an infinitely long delay line comprising, calibrating a delay line by identifying a physical position in said delay line called the ESP (End Stage Pointer) which physical position is the exact location at which a signal traversing said delay line is phase shifted by 360 degrees of the cycle of said signal in relation to the phase of said signal at a first point into said delay line; providing, in operation, a detector for identifying when an input signal traversing through said delay line arrives at said ESP; connecting selectable intermediate positions in said delay line to the output of said delay line in response to a code provided to a high speed position selector; and changing said code so that said delay line is continuously being configured as a rotation ring where the ESP is effectively connected to the first stage.
Claim 2
Dependent Claim
63 words
The method of claim 1 wherein the step of connecting selectable intermediate increasing delay path positions includes, controlling said high speed position selector with a selector code having a one for one relationship between said code and a selected delay position provided to said delay output, and wherein said selector code is a binary word which has one bit for every selectable position.
Claim 3
Dependent Claim
14 words
The method of Claim 2 wherein said high speed position selector is a MUX.
Claim 4
Dependent Claim
42 words
The method of Claim 3 wherein said step of changing said code includes changing the number of stages in a bidirectional shift register having a variable number of stages, wherein each stage has an output which represents one bit of said code.
Claim 5
Dependent Claim
30 words
The method of Claim 4 wherein the step of changing the number of stages in a bidirectional shift register is controlled so that the last stage corresponds to said ESP.
Claim 6
Dependent Claim
196 words
A digitally adjustable continuously variable length delay line phase shifter circuit for providing a phase shifted replica of an input signal comprising; a MUX signal selector; a delay circuit for receiving said input signal, said delay circuit comprising a series connected plurality of unit delay elements, each said delay unit element having an input and output terminal, and a plurality of taps connecting to a plurality of said unit delay inputs and to said MUX signal selector; means for determining the 360 degree End Stage Position (ESP) in said delay circuit; means for controlling said MUX signal selector responsive to a digital command so that said MUX passes the signal at a selected one of unit delay inputs through said MUX, said means for controlling said MUX signal selector including means for causing said MUX to select an earlier unit delay element stage output after a said signal traversing the delay line reaches said ESP and more delay is requested even though said delay circuit has additional later stages which could have been selected to increase the delay, whereby the delay circuit is wrapped around at said ESP to enable continuous phase adjustment with constant steps.
Claim 7
Dependent Claim
49 words
The phase shifter circuit of claim 6 wherein said means for causing said MUX to select an early stage after it reaches a predetermined later stage includes means to establish said ESP by determining at which tap the said input signal would be shifted in phase by 360 degrees.
Claim 8
Dependent Claim
48 words
The phase shifter of claim 7 wherein said means to establish said ESP comprises a phase shift range calibrator including a phase comparator, said phase comparator having a pair of delay circuits, said pair of delay circuits being identical to said delay circuit for receiving said input signal.
Claim 9
Dependent Claim
58 words
The phase shifter of claim 8 wherein said means for controlling said MUX signal selector includes a rotating phase shift control, said rotating phase shift control being responsive to an up and down command signal to cause said MUX signal selector to select an output from a later unit delay element and an earlier unit delay element respectively.
Claim 10
Dependent Claim
28 words
The phase shifter of claim 9 wherein said rotating phase shift control includes means to control said delay circuit by providing a digital code word to said MUX.
References Cited (Backward Citations)
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