Semiconductor memory system including a flash EEPROM

Claim 2

The semiconductor memory system according to claim 1, wherein the first memory drive stores the first file management information (191, 192, 193), and the second memory drive stores the second file management information (194, 195, 196).

Claim 3

The semiconductor memory system according to claim 1, further comprising a temporary memory, wherein the first and second file management information (150) is stored in the temporary memory (133).

Claim 4

The semiconductor memory system according to claim 1, wherein the first and second EEPROMs and the access controlling means (132) are mounted on a mother board (710) in the host system (600).

Claim 5

The semiconductor memory system according to claim 1, wherein the first and second EEPROMs (181, 182) are provided as first and second flash EEPROM chips (101, 102, 103, 104, 105, 106); the memory system further comprising slots (201, 202, 203, 204, 205, 206) for removably connecting the first and second flash EEPROM chips (101, 102, 103, 104, 105, 106).

Claim 6

The semiconductor memory system according to claim 1, wherein the first and second EEPROMs (181, 182) are provided as first and second flash EEPROM chips (101, 102, 103, 104, 105, 106); the memory system further comprising a slot (111) for removably connecting another flash EEPROM chip.

Claim 7

The semiconductor memory system according to claim 6, the memory system further comprising slots (201, 202, 203, 204, 205, 206) for removably connecting the first and second flash EEPROM chips (101, 102, 103, 104, 105, 106).

Claim 9

A method of claim 8, further comprising steps of: removing one of the flash EEPROM chips (101, 102, 103) included in the memory area of the first drive; and reformatting the memory area of the first drive.

Claim 10

A method of claim 8, further comprising the steps of: removing one of the flash EEPROM chips (101, 102, 103) included in the memory area of the first drive; connecting a new flash EEPROM chip to the controller (132); managing the new flash EEPROM chip as included in the first memory drive; and reformatting the memory area of the first drive.

Claim 11

A method of claim 8,wherein the semiconductor memory device has a slot, connected to the controller, further comprising the steps of: inserting a new flash EEPROM chip into the slot, copying data from a selected chip included in memory area of the first drive into the new flash EEPROM chip; and reassigning the new EEPROM chip as included in the memory area of the first drive.

Claim 12

A method of claim 11, wherein the selected one of the flash EEPROM chips (101, 102, 103) has a rewrite counter for counting a number of rewrite times of the selected flash EEPROM chip, further comprising the step of: rewriting a value of the rewrite counter to '0' in the new EEPROM chip.

Claim 13

A method of claim 8, further comprising steps of: removing a selected one of the flash EEPROM chips (101, 102, 103) included in the memory area of the first drive; installing a new flash EEPROM chip which has a memory capacity greater than the selected one of the flash EEPROM chips (101, 102, 103); and assigning in the new flash EEPROM chip a replacement memory area substantially equal in capacity to the memory capacity of the selected one of the flash EEPROM chips (101, 102, 103), and an expansion memory area of the first drive having a capacity substantially equal to a remaining portion of the new flash EEPROM chip.

Claim 16

A semiconductor memory system comprising: flash EEPROM unit (360) having a flash EEPROM cell array and peripheral logic for controlling the cell array; a controller (332) for controlling the flash EEPROM unit and an external flash EEPROM chip (401, 402, 403), coupled to a control line for transferring a memory command to the flash EEPROM unit, an input/output bus for transferring a memory address and data and a first select line for selecting the flash EEPROM unit; a host interface (320) for communicating with a host system (1); a command interface (321) connected to the control line for communicating to the external flash EEPROM chip (401, 402, 403); a data interface (322) connected to the input/output bus for communicating to the external flash EEPROM chip (401, 402, 403); and a chip enable interface (323) connected to a second select line for selecting the external flash EEPROM chip (401, 402, 403); wherein, components of the memory system are configured as one package, and said controller (332) controls the external flash EEPROM chip by selecting the second select line.

Claim 17

The semiconductor memory system according to claim 16, wherein, the semiconductor memory system is mounted on a mother board (710) in the host system (600).

Claim 18

A semiconductor memory system comprising: an external flash EEPROM chip (401); and a semiconductor disk LSI (300), housed by one package, the semiconductor disk LSI (300) including: a flash EEPROM unit (360) having a flash EEPROM cell array and peripheral logic for controlling the cell array; a controller for controlling the flash EEPROM unit (360) and the external flash EEPROM chip (401) coupled to a control line for transferring a memory command to the flash EEPROM unit (360) , an input/output bus for transferring a memory address and data and a first select line for selecting the flash EEPROM unit (360); a host interface (320) for communicating to a host system (1); a command interface (321) connected to the control line for communicating to the external flash EEPROM chip; a data interface (322) connected to the input/output bus for communicating to the external flash EEPROM chip (401); and a chip enable interface (323) connected to a second select line for selecting the external flash EEPROM chip (401); wherein a first memory block (500) includes a memory area of the flash EEPROM unit (360) and is managed in accordance with first file management information (491) which indicates correspondence between logical addresses and physical addresses; wherein a second memory block (510) includes a memory area of the external flash EEPROM chip (401) and is managed in accordance with second file management information (494) which indicates correspondence between physical addresses and logical addresses; means for controlling access to the flash EEPROM unit (360) and external flash EEPROM chip (401) including address converting means converts a logical address, from the host system (1) into a physical address, according to one of the first file management information (491) and the second management information (494); the access controlling means further including memory accessing means, coupled to the flash EEPROM unit (360) and the external flash EEPROM chip (401), for accessing a selected EEPROM according to the physical address from said address converting means.

Claim 19

The semiconductor memory system according to claim 18, further including a second external flash EEPROM chip, wherein the first memory block further includes a memory area of the second external flash EEPROM chip .

Claim 20

A semiconductor memory system provided as a secondary memory for a host computer (600), comprising: a plurality of flash EEPROM chips (401, 402, 403); and a controller (300) connected to each of the flash EEPROM chips for controlling each of the flash EEPROM chips (401, 402, 403), according to requests for disk access from a host system (600);and wherein the semiconductor memory system is mountable on a mother board (710) of the host system (600).

Claim 21

The semiconductor memory system according to claim 20, further comprising a plurality of slots connected to the controller (300), for connecting to the controller the plurality of flash EEPROM chips(401, 402, 403).

Claim 22

The semiconductor memory system according to claim 21, further comprising a controller slot directly connected to the host system (600).

Claim 23

The semiconductor memory system according to claim 22, further comprising an ID signal line, for indicating whether the host system (600) is connected to the controller (300).