Semiconductor device and methods for producing and mounting the semiconductor device

Claim 1

A high frequency and high output semiconductor chip (101) comprising a semiconductor substrate (1) having an active element on a front surface thereof and a supporting substrate (101a) for supporting said semiconductor substrate (1) disposed on a rear surface of the semiconductor substrate (1), said supporting substrate (101a) characterized by: a radiating layer (77) for radiating heat generated by said active element, disposed on a part of the rear surface of said semiconductor substrate (1) directly opposite said active element; and a plated metal layer (79) comprising Rh, Pt, or Ni-B-W, or a plated metal layer (79) comprising alternatingly laminated Au and one selected from Rh, Pt, and Ni-B-W, having a linear thermal expansion coefficient nearer to that of said semiconductor substrate (1) than that of said radiating layer (77), disposed on part of the rear surface of said semiconductor substrate (1) but not directly opposite said active element.

Claim 2

A method of producing semiconductor chips including: preparing a semiconductor wafer (10) having opposite front and rear surfaces and a plurality of active elements on the front surface; plating metal (5) over the rear surface of the wafer (10) by electroless plating; selectively plating metal on regions of the rear surface of the wafer opposite said active elements to produce radiating layers (77); plating Rh, Pt, or Ni-B-W over the rear surface of the wafer, or alternatingly plating Au and one selected from Rh, Pt, and Ni-B-W over the rear surface of the wafer, forming plated metal layer (79); flattening the rear surface of the wafer by polishing said plated metal layer (79) until said radiating layers (77) are exposed; and plating Au (55) over the flattened rear surface of the wafer by electroplating.

Claim 4

A method of producing semiconductor chips including: preparing a semiconductor wafer (10) having opposite front and rear surfaces and a plurality of active elements on the front surface; plating metal (5) over the rear surface of the wafer (10) by electroless plating; selectively plating metal on regions of the rear surface of the wafer opposite said active elements to produce radiating layers (77); applying ceramic paste comprising ceramic particles dispersed in a solvent over the rear surface of the wafer (79); drying said ceramic paste to evaporate said solvent, producing a ceramic layer (79); flattening the rear surface of the wafer by polishing said ceramic layer (79) until said radiating layers (77) are exposed; curing said ceramic layer (79) by annealing; and plating Au (55) over the rear surface of the wafer by electroplating.

Claim 9

A method for producing semiconductor chips comprising: forming active elements on a plurality of chip regions on a first surface of a semiconductor wafer (10), said chip regions being separated from each other by dicing lines; plating metal (5) over a second surface of the wafer (10) by electroless plating; selectively plating metal on regions of the second surface of the wafer directly opposite said active elements to produce radiating layers (77); selectively plating relatively hard metal (78) on regions of the second surface of the wafer opposite said dicing lines to a thickness equal to that of said radiating layer (77); plating Rh, Pt, or Ni-B-W over the second surface of the wafer, or alternatingly plating Au and one selected from Rh, Pt, and Ni-B-W over the second surface of the wafer, forming a plated metal layer (79); flattening the second surface of the wafer by polishing said plated layer (79) until said radiating layers (77) and said plated hard metal layers (78) are exposed; plating Au (55) over the flattened second surface of the wafer by electroplating; and cutting through the wafer along said dicing lines with a dicing blade (8) to produce a plurality of semiconductor chips.

Claim 10

A method of producing semiconductor chips comprising: forming active elements on a plurality of chip regions on a first surface of a semiconductor wafer (10), said chip regions being separated from each other by dicing lines; plating metal over a second surface of the wafer (10) by electroless plating; selectively plating metal on regions of the second surface of the wafer opposite said active elements to produce radiating layers (77); selectively plating relatively hard metal (78) on regions of the second surface of the wafer opposite said dicing lines to a thickness equal to that of said radiating layer (77); applying ceramic paste comprising ceramic particles dispersed in a solvent over the second surface of the wafer; drying said ceramic paste to evaporate said solvent, producing a ceramic layer (79); flattening the second surface of the wafer by polishing said ceramic layer (79) until said radiating layers (77) and said plated hard metal layers (78) are exposed; curing said ceramic layer (79) by annealing; plating Au (55) over the second surface of the wafer by electroplating; and cutting through the wafer along said dicing lines with a dicing blade (8) to produce a plurality of semiconductor chips.

Claim 12

A method for producing semiconductor chips comprising: forming active elements on a plurality of chip regions on a first surface of a semiconductor wafer (10), said chip regions being separated from each other by chip separation lines; depositing an insulating film over the first surface of said wafer (10); selectively etching said insulating film and said wafer (10) from the first surface along said chip separation lines using a first photoresist mask (40) to form dicing grooves (1a); selectively activating the surface exposed in said dicing grooves (1a) with paradium using said first photoresist mask (40) to deposit Pd nucleuses (60) on said surface; selectively forming metal layers (56) on the activated surface in the dicing grooves (1a) using a second photoresist mask (41) by successively performing electroless plating and electroplating; selectively plating metal on regions of a second surface of the wafer (10) opposite said active elements to produce radiating layers (77); selectively plating relatively hard metal (78) on regions of the second surface of the wafer opposite said dicing grooves (1a) to a thickness equal to that of said radiating layer (77); plating Rh, Pt, or Ni-B-W over the second surface of the wafer, or alternatingly plating Au and one selected from Rh, Pt, and Ni-B-W over the second surface of the wafer, forming a plated metal layer (79); flattening the second surface of the wafer by polishing said plated layer (79) until said radiating layers (77) and said plated hard metal layers (78) are exposed; plating Au (55) over the flattened second surface of the wafer by electroplating; and cutting through the wafer along said dicing grooves (1a) with a dicing blade (8) to produce a plurality of semiconductor chips.

Claim 13

A method for producing semiconductor chips comprising: forming active elements on a plurality of chip regions on a first surface of a semiconductor wafer (10), said chip regions being separated from each other by chip separation lines; depositing an insulating film over the first surface of said wafer; selectively etching said insulating film and said wafer from the first surface along said chip separation lines using a first photoresist mask (81) to form dicing grooves (1a); forming a feeding layer (86) over the first surface of the wafer by sputtering; selectively forming metal layers (87) in said dicing grooves (1a) by electroplating using a second photoresist mask (85); removing said first photoresist mask (81) and overlying portions of said feeding layer (86) and said second photoresist mask (85) by lift-off; selectively plating metal on regions of a second surface of the wafer opposite said active elements to produce radiating layers (77); selectively plating relatively hard metal (78) on regions of the second surface of the wafer opposite said dicing grooves (1a) to a thickness equal to that of said radiating layer (77); plating Rh, Pt, or Ni-B-W over the second surface of the wafer, or alternatingly plating Au and one selected from Rh, Pt, and Ni-B-W over the second surface of the wafer, forming a plated metal layer (79); flattening the second surface of the wafer by polishing said plated layer (79) until said radiating layers (77) and said plated hard metal layers (78) are exposed; plating Au (55) over the flattened second surface of the wafer by electroplating; and cutting through the wafer along said dicing grooves (1a) with a dicing blade (8) to produce a plurality of semiconductor chips.

Claim 14

A method for mounting a semiconductor chip on a chip carrier, comprising: preparing a semiconductor chip (101) having opposite front and rear surfaces and an active element on the front surface; applying solder (9) on the rear surface of the semiconductor chip to a prescribed thickness; picking up said semiconductor chip by a collet (120) with the rear surface facing downward and exposing said solder layer to a reducing atmosphere (19) to remove an oxide film (9a) on the surface of the solder layer; adhering said semiconductor chip onto a chip carrier(20) via said solder layer by applying pressure to said semiconductor chip by said collet; and cooling said chip carrier to the room temperature while pressing said semiconductor chip on said chip carrier.