Patent EP0566872A2 successfully refreshed from Google Patents.
EP0566872A2
Expired / Lapsed
EP
⏱️ 0.0 years remaining
A thermally enhanced semiconductor device and method for making the same
Assignee: Motorola Solutions Inc
•
Filing: 1993-03-18
•
Granted: —
•
Expires: 2013-03-18
Abstract
Abstract A molded semiconductor device (24) having greater resistance to package cracking during board mounting in addition to increased thermal performance is provided wherein the device has a reduced semiconductor die to flag interface and a drop-in heat sink. The semiconductor die (12) is mounted on a leadframe (16) having a flag (15) with an opening to expose a substantial portion of the inactive surface (14) of the die (12). Decreasing the interfacial contact area between the die (12) and the flag (15) reduces the risk of package cracking during board mounting by limiting the area where delamination typically occurs. An encapsulant (22) forms a package body which encompasses an opening (23) to expose a substantial portion of the inactive surface (14) of the semiconductor die (12). A heat sink (26) is inserted into the opening (23), directly coupling the heat sink (26) to the die (12), after the semiconductor package is mounted onto a printed circuit board.
Inventors
- 👤 Bennett A. Joiner, Jr.
Bibliographic Details
Application Number
—
Jurisdiction
EP
Data Source
google_patents
Last Synchronized
2026-11-04 16:32
CPC Classifications
H; H10; H10W; H10W70/00; H10W70/40; H10W70/461; H10W70/01; H10W70/04; H10W40/00; H10W40/70; H10W40/77; H10W40/778; H10W70/045; H10W70/411; H10W70/464; H10W72/00; H10W72/50; H10W72/551; H10W72/552; H10W72/5522; H10W72/5524; H10W72/5525; H10W74/00; H10W74/10; H10W74/131; H10W74/142; H10W90/00; H10W90/701; H10W90/751; H10W90/756
Claims Analysis
Total Claims: 10
Claim 1
Independent Claim
183 words
A thermally enhanced semiconductor device (10) comprising: a semiconductor die(12) having an active surface (13), an inactive surface (14), and a periphery, wherein the semiconductor die has a plurality of bonding pads on the active surface; a leadframe (16) having a plurality of leads (18) and a mounting surface (15) with a die opening (6), the die opening being smaller than the semiconductor die, a first portion of the inactive surface of the semiconductor die being bonded to the mounting surface of the leadframe above the die opening thereby exposing a second portion of the inactive surface of the semiconductor die; a plurality of conductive wires (20) electrically coupling the plurality of bonding pads on the active surface of the semiconductor die to the plurality of leads of the leadframe; and an encapsulant forming a package body (22) around the periphery, over the active surface, and over the first portion of the inactive surface of the semiconductor die, the wires, and the leadframe, wherein the package body encompasses an opening (23) exposing the second portion of the inactive surface of the semiconductor die.
Claim 2
Dependent Claim
145 words
A thermally enhanced semiconductor device (30) comprising: a semiconductor die (32) having an active surface (34), an inactive surface (36), and a periphery, wherein the semiconductor die has a plurality of bonding pads on the active surface; a flagless leadframe (40) having a plurality of leads (38), a number of the plurality of leads being mounted on the active surface (34) of the semiconductor die and along the periphery thereof, the plurality of leads being selectively electrically coupled to the plurality of bonding pads on the active surface of the semiconductor die, and exposing the inactive surface of the semiconductor die; and an encapsulant forming a package body (44) around the semiconductor die including the periphery and the active surface, and the leadframe, wherein the package body encompasses an opening (46) exposing at least a substantial portion of the inactive surface of the semiconductor die.
Claim 3
Dependent Claim
147 words
A thermally enhanced semiconductor device (48) comprising: a semiconductor die (50) having an active surface (52), an inactive surface (54), and a periphery, wherein the semiconductor die has a plurality of bonding pads on the active surface; a flagless leadframe (58) having a plurality of leads (56) which are mounted on a first portion of the inactive surface (54) of the semiconductor die and along the periphery thereof, thereby exposing a second portion of the inactive surface, the plurality of leads selectively electrically coupled to the plurality of bonding pads on the active surface of the semiconductor die; and an encapsulant forming a package body (62) around the semiconductor die including the periphery, the active surface, and the first portion of the inactive surface, and the leadframe, wherein the package body encompasses an opening (64) exposing the second portion of the inactive surface of the semiconductor die.
Claim 4
Dependent Claim
31 words
The semiconductor device according to claim 1, 2, or 3 wherein the leadframe comprises a surface treatment selected from a group consisting of: plating, organic coating, oxidation, and UV ozone cleaning.
Claim 5
Dependent Claim
37 words
The semiconductor device according to claim 1, 2, or 3 further comprising: a thermally conductive heat spreader (26) attached to the non-active surface of the semiconductor die wherein the heat spreader is not encapsulated by the encapsulant.
Claim 6
Dependent Claim
30 words
The semiconductor device according to claim 1, 2, or 3 wherein the thermally conductive heat spreader (26) is coupled to the inactive surface of the semiconductor die with an adhesive.
Claim 7
Dependent Claim
30 words
The semiconductor device according to claim 1, 2, or 3 wherein the thermally conductive heat spreader is coupled to the inactive surface of the semiconductor die with a thermal grease.
Claim 8
Independent Claim
150 words
A method of manufacturing a thermally enhanced semiconductor device (10) comprising the steps of: providing a semiconductor die (12) having an active surface (13), an inactive surface (14), and a periphery; providing a leadframe (16) having a die mounting area (15) and a plurality of leads (18); mounting the semiconductor die onto the die mounting area wherein the die mounting area supports a first portion of the inactive surface around the periphery of the semiconductor die, exposing a second portion of the inactive surface of the semiconductor die; electrically coupling the semiconductor die to the plurality of leads of the leadframe; and molding a package body (22) around the periphery, over the active surface, and over the first portion of the inactive surface of the semiconductor die, and the leadframe, wherein the package body encompasses an opening (23) exposing the second portion of the inactive surface of the semiconductor die.
Claim 9
Dependent Claim
39 words
The method of manufacturing a semiconductor device according to claim 8 wherein the step of providing a leadframe further comprises performing a leadframe surface treatment selected from a group consisting of: plating, organic coating, oxidation, and UV ozone cleaning.
Claim 10
Dependent Claim
41 words
The method of manufacturing a semiconductor device according to claim 8 further comprising the step of; attaching a thermally conductive heat spreader (26) to the inactive surface of the semiconductor die wherein the heat spreader is not encapsulated by the encapsulant.
References Cited (Backward Citations)
No citation records indexed.
USPTO Annuity & Maintenance Windows
Maintenance schedule is calculated for granted US utility patents.