Patent EP0555886A2 successfully refreshed from Google Patents.
EP0555886A2
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Hetero-junction field effect transistor
Assignee: Sumitomo Electric Industries Ltd
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Filing: 1993-02-15
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Granted: —
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Expires: 2013-02-15
Abstract
Abstract A high speed transistor featured by a wide operation range and a high gain has a channel layer of three-layer structure having undoped GaInAs layers (130a, 130b) arranged above and beneath a GaAs layer (140) including at least one delta doped layer (n-type). A cap layer (150) which is an undoped GaAs layer and a buffer layer (120) are formed above and beneath the channel layer of three-layer structure, on a substrate (110). A gate electrode (340), and a source region (350a), a drain region (350b), a source electrode (360) and a drain electrode (370) which are self-aligned to the gate electrode (340) are formed. <IMAGE>
Inventors
- 👤 Nobuhiro C/O Yokohama Works Kuwata
Bibliographic Details
Application Number
—
Jurisdiction
EP
Data Source
google_patents
Last Synchronized
2026-11-06 14:39
CPC Classifications
H; H10; H10D; H10D30/00; H10D30/40; H10D30/47; H10D30/471; H10D30/473; H10D30/4732; H10D30/4738
Claims Analysis
Total Claims: 18
Claim 1
Independent Claim
86 words
A semiconductor device having a drain electrode, a source electrode and a gate electrode and controlling a current flowing through a channel between the drain and the source by a voltage applied to said gate electrode, comprising a channel layer formed by a GaAs layer including n-type dopant and undoped GaInAs layers sandwiching said GaAs layer; and a buffer layer made of an undoped semiconductor having a larger electronegativity than that of GaInAs; said channel layer being formed between said buffer layer and said gate electrode.
Claim 2
Dependent Claim
23 words
A semiconductor device according to claim 1, wherein the semiconductor of said buffer layer has a larger band gap than that of GaInAs.
Claim 3
Dependent Claim
35 words
A semiconductor device according to claim 1 or 2, further comprising an undoped cap layer electrically connected to said gate electrode and made of a semiconductor having a larger band gap than that of GaInAs.
Claim 4
Dependent Claim
23 words
A semiconductor device according to any of claims 1 to 3, wherein a carrier density of said channel layer is smaller than 10¹⁵cm⁻³.
Claim 5
Dependent Claim
36 words
A semiconductor device according to claim 1, wherein said channel layer includes at least one two-dimensional layer including n-type dopant, undoped GaAs layers sandwiching said two dimensional layer and undoped GaInAs layers sandwiching said GaAs layer.
Claim 6
Dependent Claim
79 words
A semiconductor device according to claim 5, wherein said buffer layer has a p carrier conductivity type and has a thickness of 10,000 angstrom, said GaInAs layer of said channel layer has an n carrier conductivity type, the layer facing said buffer layer primarily consists of Ga 0.72 In 0.18 As and has a thickness of 80 angstrom, and the layer facing said gate electrode primarily consists of Ga 0.80 In 0.20 and has a thickness of 100 angstrom.
Claim 7
Dependent Claim
43 words
A semiconductor device according to Claim 6, further comprising an undoped n-type cap layer electrically connected to said gate electrode and made of a semiconductor having a larger band gap than that of GaInAs, said cap layer having a thickness of 300 angstrom.
Claim 8
Dependent Claim
36 words
A semiconductor device according to any of claims 5 to 7, wherein a carrier density of the undoped layers sandwiching said two-dimensional layer of the GaAs layers of said channel layer is smaller than 10¹⁵ cm⁻³.
Claim 9
Dependent Claim
25 words
A semiconductor device according to any of claims 5 to 8, wherein a proportion of In in said undoped GaInAs layer changes continuously or stepwise.
Claim 10
Dependent Claim
34 words
A semiconductor device according to any of claims 1 to 9, wherein a drain region and a source region are formed by introducing impurity up to neighborhood of the opposite ends of said channel.
Claim 11
Dependent Claim
28 words
A semiconductor device according to any of claims 1 to 10, wherein carrier densities of said undoped GaInAs layer and said buffer layer are smaller than 10¹⁵ cm⁻³.
Claim 12
Dependent Claim
28 words
A semiconductor device according to claim 1, wherein said channel layer includes an n-type GaAs layer doped with n-type dopant and undoped GaInAs layers sandwiching said GaAs layer.
Claim 13
Dependent Claim
30 words
A semiconductor device according to claim 12, further comprising an undoped spacer layer including GaAs formed between said undoped GaInAs layer facing said buffer layer and said n-type GaAs layer.
Claim 14
Dependent Claim
82 words
A semiconductor device according to claim 12 or 13, wherein said buffer layer has a p carrier conductivity type and has a thickness of 10,000 angstrom, said GaInAs layer of said channel layer has an n carrier conductivity type, the layer facing said buffer layer primarily consists of Ga 0.72 In 0.18 As and has a thickness of 80 angstrom, and the layer facing said gate electrode primarily consists of Ga 0.80 In 0.20 As and has a thickness of 100 angstrom.
Claim 15
Dependent Claim
47 words
A semiconductor device according to any of claims 12 to 14, further comprising an undoped n-type cap layer electrically connected to said gate electrode and made of a semiconductor having a larger band gap than that of GaInAs, said cap layer having a thickness of 300 angstrom.
Claim 16
Dependent Claim
25 words
A semiconductor device according to claim 14 or 15, wherein said n-type GaAs layer of said channel layer has a carrier density of 10¹⁸ cm⁻³.
Claim 17
Independent Claim
107 words
A method for manufacturing a semiconductor device comprising the steps of: sequentially forming a buffer layer made of undoped GaAs and an undoped GaInAs layer on a GaAs substrate; alternately growing an undoped GaAs layer and a delta doped layer having n-type dopant delta-doped on said GaInAs layer to form a channel layer; forming a GaInAs layer and an undoped GaAs layer on said channel layer and forming a gate electrode on a predetermined area on said undoped GaAs layer; and forming a source region and a drain region by ion implantation with self-alignment to said gate electrode and forming a source electrode and a drain electrode.
Claim 18
Independent Claim
111 words
A method for manufacturing a semiconductor device comprising the steps of: sequentially forming a buffer layer made of undoped GaAs and an undoped GaInAs layer on a GaAs substrate; successively growing an undoped GaAs layer, a delta doped layer having n-type dopant delta-doped and an undoped GaAs layer on said GaInAs layer to form a channel layer; forming a GaInAs layer and an undoped GaAs layer on said channel layer and forming a gate electrode on a predetermined area on said undoped GaAs layer; and forming a source region and a drain region by ion implantation with self-alignment to said gate electrode and forming a source electrode and a drain electrode.
References Cited (Backward Citations)
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