Patent EP0549052B1 successfully refreshed from Google Patents.
EP0549052B1
Expired / Lapsed
EP
⏱️ 0.0 years remaining
An apparatus featuring a feedback signal for controlling a powering voltage for asynchronous electronic circuitry therein
Assignee: Koninklijke Philips NV
•
Filing: 1992-12-16
•
Granted: 1996-03-13
•
Expires: 2012-12-16
Abstract
No abstract record available.
Inventors
- 👤 Cornelis Niessen
- 👤 Cornelis Hermanus Van Berkel
Bibliographic Details
Application Number
—
Jurisdiction
EP
Data Source
google_patents
Last Synchronized
2026-11-07 23:15
CPC Classifications
G; G06; G06F; G06F5/00; G06F5/06; G06F1/00; G06F1/26; G06F1/32; G06F13/00; G06F2205/00; G06F2205/06; G06F2205/061
Claims Analysis
Total Claims: 9
Claim 1
Independent Claim
107 words
An apparatus comprising a data source means (22, Fig, 1), feeding buffer means (20) for intermediate storage of data and subsequent outputting thereof, and comprising feedback means (24, 26) for, under control of a filling degree signal of said buffer means (20),dynamically controlling the data generating rate of said data source means (22), wherein said feedback means (24, 26) controls the actual powering voltage (Vo) of said data source means (22), which powering voltage (Vo) directly controls the overall data generating rate of said data source means (22), characterized in that said data source means (22) comprises integrated digital data processing electronic circuitry comprising self-timed circuit elements.
Claim 2
Independent Claim
106 words
An apparatus comprising buffer means (20, Fig.2) for receiving and intermediate storing of data and subsequent outputting thereof to data processing means (22), and comprising feedforward means (28, 26) for, under control of a filling degree signal of said buffer means (20), dynamically controlling the data handling rate of said data processing means (22), wherein said feedforward means (28, 26) controls the actual powering voltage (Vo) of said data processing means (22), which powering voltage (Vo) directly controls the overall data handling rate of said data processing means (22), wherein said data processing means (22) comprises integrated digital data processing electronic circuitry comprising self-timed circuit elements.
Claim 3
Dependent Claim
17 words
An apparatus as claimed in Claim 1 or 2, wherein said self-timed circuit elements are delay-insensitive elements.
Claim 4
Dependent Claim
17 words
An apparatus as claimed in Claim 3, wherein said delay-insensitive elements have interelement interfacing by handshake means.
Claim 5
Independent Claim
17 words
An apparatus as claimed in any one of Claims 1 to 4 and executed as battery-powered apparatus.
Claim 6
Independent Claim
17 words
An apparatus as claimed in any one of Claims 1 to 5 and executed as portable apparatus.
Claim 7
Independent Claim
36 words
An apparatus as claimed in any one of Claims 1 to 6 and wherein said data processing electronic circuitry is programmed for data conversion as based on a conversion key, conversion table or conversion expression set.
Claim 8
Independent Claim
23 words
An apparatus as claimed in any one of Claims 1 to 7 wherein said circuitry is based at least partly on CMOS technology.
Claim 9
Independent Claim
33 words
An apparatus as claimed in any one of Claims 1 to 8 and combined with stop-go control means based upon a further filling degree signal of said buffer effective on said electronic circuitry.
References Cited (Backward Citations)
No citation records indexed.
USPTO Annuity & Maintenance Windows
Maintenance schedule is calculated for granted US utility patents.