Patent EP0545581A2 successfully refreshed from Google Patents.
EP0545581A2
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EP
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Integrated data processing system including CPU core and parallel, independently operating DSP module
Assignee: National Semiconductor Corp
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Filing: 1992-11-19
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Granted: —
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Expires: 2012-11-19
Abstract
Abstract The present invention is directed to various features of an integrated data processing system that includes a general purpose (GP) CPU core for processing data in accordance with a GP instruction set and a digital signal processor (DSP) module for processing data in accordance with command-list code. The DSP module is operable to execute the command-list code independent of and in parallel with execution of the GP instruction set by the CPU core.
Inventors
- 👤 Alberto Sandbank
- 👤 Moshe Doron
- 👤 Meir Tsadik
- 👤 Amos Intrater
- 👤 Andy Birenbaum
- 👤 Gideon Intrater
- 👤 Iddo Carmon
- 👤 Ilan Shimony
- 👤 Itael Fraenkel
- 👤 Lev Epstein
- 👤 Lior Katzri
- 👤 Omri Viner
- 👤 Raya Levitan
- 👤 Ronny Cohen
- 👤 Sidi Yomtov
- 👤 Yehezkel Tzadik
- 👤 Zvi Greenfeld
- 👤 Israel Greiss
- 👤 Oved Oz
- 👤 Yachin Afek
Bibliographic Details
Application Number
—
Jurisdiction
EP
Data Source
google_patents
Last Synchronized
2026-11-08 15:46
CPC Classifications
G; G06; G06F; G06F15/00; G06F11/00; G06F11/36; G06F11/362; G06F11/3648; G06F11/3656; G06F11/3698; G06F13/00; G06F13/14; G06F13/20; G06F13/24; G06F15/76; G06F15/78; G06F15/7839; G06F15/7842; G06F9/00; G06F9/06; G06F9/30; G06F9/30145; G06F9/3016; G06F9/30167; G06F9/32; G06F9/38; G06F9/3877; G06F9/3879; H; H04; H04L; H04L27/00; H04L27/32; H04L27/34; H04L27/38
Claims Analysis
Total Claims: 47
Claim 1
Independent Claim
65 words
An integrated data processing system comprising: (a) a general purpose (GP) CPU core for processing data in accordance with a GP instruction set; and (b) a digital signal processor (DSP) module for processing data in accordance with command-list code, the DSP module being operable to execute said command-list code independent of and in parallel with execution of said GP instruction set by said CPU core.
Claim 2
Dependent Claim
65 words
An integrated data processing system comprising: (a) a general purpose (GP) CPU core for processing data in accordance with a GP instruction set; and (b) a digital signal processor (DSP) module for processing data in accordance with command-list code, the DSP module being operable to execute said command-list code independent of and in parallel with execution of said GP instruction set by said CPU core.
Claim 3
Dependent Claim
30 words
An integrated data processing system as in claim 1 and further comprising a DSP memory element, accessible to the DSP module, for storing operand data utilizable by the DSP module.
Claim 4
Dependent Claim
29 words
An integrated data processing system as in claim 2 wherein the DSP memory element is accessible to the CPU core when the DSP module is not executing command-list code.
Claim 5
Dependent Claim
61 words
An integrated data processing system comprising: (a) a general purpose (GP) CPU core for processing data in accordance with a GP instruction set; (b) a digital signal processor (DSP) module for processing data in accordance with command-list code; and (c) a DSP memory bank, accessible to the DSP module, that stores command-list code and operand data without restriction as to placement.
Claim 6
Dependent Claim
61 words
An integrated data processing system comprising: (a) a general purpose (GP) CPU core for processing data in accordance with a GP instruction set; (b) a digital signal processor (DSP) module for processing data in accordance with command-list code; and (c) a DSP memory bank, accessible to the DSP module, that stores command-list code and operand data without restriction as to placement.
Claim 7
Dependent Claim
88 words
An integrated data processing system comprising: (a) a general purpose (GP) CPU core for processing data in accordance with a GP instruction set; and (b) a digital signal processor (DSP) module for processing data in accordance with command-list code, the command-list code being structured to enable activation of the DSP module to execute command-list code in parallel to execution of said GP instruction set by said CPU core, DSP module operation being supported by a DSP memory element shared by command list code and two vector operand streams.
Claim 8
Dependent Claim
88 words
An integrated data processing system comprising: (a) a general purpose (GP) CPU core for processing data in accordance with a GP instruction set; and (b) a digital signal processor (DSP) module for processing data in accordance with command-list code, the command-list code being structured to enable activation of the DSP module to execute command-list code in parallel to execution of said GP instruction set by said CPU core, DSP module operation being supported by a DSP memory element shared by command list code and two vector operand streams.
Claim 9
Dependent Claim
30 words
An integrated data processing system as in claim 5 and further comprising means for vector operands specification, generating looping constructs, vector address incrementation and wrap-around scheme for cyclic buffer support.
Claim 10
Dependent Claim
55 words
An integrated data processing system comprising: (a) a general purpose (GP) CPU core for processing data in accordance with a GP instruction set; (b) a digital signal processor (DSP) module for processing data in accordance with command-list code; and (c) lattice filter/inverse lattice filter means for utilizing "vector-lattice-propagate" and "vector-multiply-and-add" pair of vector DSP instructions.
Claim 11
Dependent Claim
55 words
An integrated data processing system comprising: (a) a general purpose (GP) CPU core for processing data in accordance with a GP instruction set; (b) a digital signal processor (DSP) module for processing data in accordance with command-list code; and (c) lattice filter/inverse lattice filter means for utilizing "vector-lattice-propagate" and "vector-multiply-and-add" pair of vector DSP instructions.
Claim 12
Dependent Claim
59 words
An integrated data processing system comprising: (a) a general purpose (GP) CPU core for processing data in accordance with a GP instruction set; (b) a digital signal processor (DSP) module for processing data in accordance with command-list code, said DSP module including means for executing a decision algorithm for a QAM/TCM modem using "vector-decide" and "vector-distance" vector DSP instructions.
Claim 13
Dependent Claim
59 words
An integrated data processing system comprising: (a) a general purpose (GP) CPU core for processing data in accordance with a GP instruction set; (b) a digital signal processor (DSP) module for processing data in accordance with command-list code, said DSP module including means for executing a decision algorithm for a QAM/TCM modem using "vector-decide" and "vector-distance" vector DSP instructions.
Claim 14
Dependent Claim
69 words
An integrated data processing system comprising: (a) a general purpose (GP) CPU core for processing data in accordance with a GP instruction set; (b) a digital signal processor (DSP) module for processing data in accordance with command-list code; and (c) means for synchronization and bus arbitration, thereby enabling said parallel DSP module to access an external memory element shared by the CPU core without the need for software invertion.
Claim 15
Dependent Claim
69 words
An integrated data processing system comprising: (a) a general purpose (GP) CPU core for processing data in accordance with a GP instruction set; (b) a digital signal processor (DSP) module for processing data in accordance with command-list code; and (c) means for synchronization and bus arbitration, thereby enabling said parallel DSP module to access an external memory element shared by the CPU core without the need for software invertion.
Claim 16
Dependent Claim
59 words
An integrated data processing system comprising: (a) a general purpose (GP) CPU core for processing data in accordance with a GP instruction set; (b) a digital signal processor (DSP) module for processing data in accordance with command-list code; and (c) means for implementing temporary prevention of said parallel DSP module from interfering with said CPU core for time-critical operations.
Claim 17
Dependent Claim
59 words
An integrated data processing system comprising: (a) a general purpose (GP) CPU core for processing data in accordance with a GP instruction set; (b) a digital signal processor (DSP) module for processing data in accordance with command-list code; and (c) means for implementing temporary prevention of said parallel DSP module from interfering with said CPU core for time-critical operations.
Claim 18
Dependent Claim
55 words
An integrated data processing system comprising; (a) a general purpose (GP) CPU core for processing data in accordance with a GP instruction set; (b) a digital signal processor (DSP) module for processing data in accordance with command-list code; and (c) debug means for enabling breakpointing and execution resumption for parallel-operating DSP module and CPU core.
Claim 19
Dependent Claim
55 words
An integrated data processing system comprising; (a) a general purpose (GP) CPU core for processing data in accordance with a GP instruction set; (b) a digital signal processor (DSP) module for processing data in accordance with command-list code; and (c) debug means for enabling breakpointing and execution resumption for parallel-operating DSP module and CPU core.
Claim 20
Dependent Claim
45 words
An integrated data processing system comprising: (a) a general purpose (GP) CPU core for processing data in accordance with a GP instruction set; and (b) a micro-coded, pipelined vector digital signal processor (DSP) module capable of executing command-list code in parallel with the CPU core.
Claim 21
Dependent Claim
45 words
An integrated data processing system comprising: (a) a general purpose (GP) CPU core for processing data in accordance with a GP instruction set; and (b) a micro-coded, pipelined vector digital signal processor (DSP) module capable of executing command-list code in parallel with the CPU core.
Claim 22
Dependent Claim
51 words
An integrated data processing system comprising: (a) a general purpose (GP) core for processing data in accordance with a GP instruction set; (b) a digital signal processor (DSP) module for processing data in accordance with command-list code; and (c) means for checking saturation in integer DSP operands without checking all bits.
Claim 23
Dependent Claim
51 words
An integrated data processing system comprising: (a) a general purpose (GP) core for processing data in accordance with a GP instruction set; (b) a digital signal processor (DSP) module for processing data in accordance with command-list code; and (c) means for checking saturation in integer DSP operands without checking all bits.
Claim 24
Dependent Claim
78 words
An integrated data processing system comprising: (a) A general purpose (GP) CPU core for processing data in accordance with a GP instruction set; and (b) a digital signal processor (DSP) module for processing data in accordance with command-list code, the DSP module being operable to execute said command-list code independent of and in parallel with execution of said GP instruction set by said CPU core and wherein said processing system is operable in two different and asynchronous frequencies.
Claim 25
Dependent Claim
78 words
An integrated data processing system comprising: (a) A general purpose (GP) CPU core for processing data in accordance with a GP instruction set; and (b) a digital signal processor (DSP) module for processing data in accordance with command-list code, the DSP module being operable to execute said command-list code independent of and in parallel with execution of said GP instruction set by said CPU core and wherein said processing system is operable in two different and asynchronous frequencies.
Claim 26
Dependent Claim
30 words
An integrated data processing system as in claim 13 and further comprising means for implementing smooth transition from one frequency to the other while the system continues to execute code.
Claim 27
Dependent Claim
50 words
An integrated data processing system comprising: (a) a general purpose (GP) CPU core for processing data in accordance with a GP instruction set; (b) a digital signal processor (DSP) module for processing data in accordance with command-list code; and (c) means for implementing different power management algorithms for the system.
Claim 28
Dependent Claim
50 words
An integrated data processing system comprising: (a) a general purpose (GP) CPU core for processing data in accordance with a GP instruction set; (b) a digital signal processor (DSP) module for processing data in accordance with command-list code; and (c) means for implementing different power management algorithms for the system.
Claim 29
Dependent Claim
53 words
An integrated data processing system as in claim 15 wherein the different power management algorithms include said CPU core operating at a very lower frequency at power down mode, only necessary system working in power down mode; real line clock and DRAM refresh, and high frequency crystal powered down in power down mode.
Claim 30
Dependent Claim
73 words
An integrated data processing system comprising: (a) a general purpose (GP) CPU core for processing data in accordance with a GP instruction set; (b) a digital signal processor (DSP) module for processing data in accordance with command-list code; and (c) means for handling NMI from different sources in such a way that no NMI gets unserviced even if 2 NMIs come close to each other when the first NMI has not been completed.
Claim 31
Dependent Claim
73 words
An integrated data processing system comprising: (a) a general purpose (GP) CPU core for processing data in accordance with a GP instruction set; (b) a digital signal processor (DSP) module for processing data in accordance with command-list code; and (c) means for handling NMI from different sources in such a way that no NMI gets unserviced even if 2 NMIs come close to each other when the first NMI has not been completed.
Claim 32
Dependent Claim
40 words
An integrated data processing system as in claim 17 and further comprising "read and clear" means for setting the stack of NMIs and handling them such that the last NMI ends first and then continues to handle the prior NMI.
Claim 33
Dependent Claim
46 words
An integrated data processing system comprising: (a) a general purpose (GP) CPU core for processing data in accordance with a GP instruction set; and (b) a digital signal processor (DSP) module for processing data in accordance with command-list code wherein the system has three operating modes.
Claim 34
Dependent Claim
46 words
An integrated data processing system comprising: (a) a general purpose (GP) CPU core for processing data in accordance with a GP instruction set; and (b) a digital signal processor (DSP) module for processing data in accordance with command-list code wherein the system has three operating modes.
Claim 35
Dependent Claim
49 words
An integrated data processing system comprising: (a) a general purpose (GP) CPU core for processing data in accordance with a GP instruction set; (b) a digital signal processor (DSP) module for processing data in accordance with command-list code; and (c) testing hooks for faciliting production testing of said system.
Claim 36
Dependent Claim
49 words
An integrated data processing system comprising: (a) a general purpose (GP) CPU core for processing data in accordance with a GP instruction set; (b) a digital signal processor (DSP) module for processing data in accordance with command-list code; and (c) testing hooks for faciliting production testing of said system.
Claim 37
Dependent Claim
46 words
An integrated data processing system comprising: (a) a general purpose (GP) core for processing data in accordance with a GP instruction set; (b) a digital signal processor (DSP) module for processing data in accordance with command-list code; and (c) means for utilizing PWM for parallel disconnect.
Claim 38
Dependent Claim
46 words
An integrated data processing system comprising: (a) a general purpose (GP) core for processing data in accordance with a GP instruction set; (b) a digital signal processor (DSP) module for processing data in accordance with command-list code; and (c) means for utilizing PWM for parallel disconnect.
Claim 39
Dependent Claim
56 words
An integrated data processing system comprising: (a) a general purpose (GP) CPU core for processing data in accordance with a GP instruction set; (b) a digital signal processor (DSP) module for processing data in accordance with command-list code; and (c) means for implementing an algorithm for DTMF detection in a fashion compatible with the Mittel benchmark.
Claim 40
Dependent Claim
56 words
An integrated data processing system comprising: (a) a general purpose (GP) CPU core for processing data in accordance with a GP instruction set; (b) a digital signal processor (DSP) module for processing data in accordance with command-list code; and (c) means for implementing an algorithm for DTMF detection in a fashion compatible with the Mittel benchmark.
Claim 41
Dependent Claim
64 words
An integrated data processing system comprising: (a) a general purpose (GP) CPU core for processing data in accordance with a GP instruction set; (b) a digital signal processor (DSP) module for processing data in accordance with command-list code; and (c) means for addressing into a microcoated routine by using the entry point address as an opcode, thereby eliminating the need for an address decoder.
Claim 42
Dependent Claim
64 words
An integrated data processing system comprising: (a) a general purpose (GP) CPU core for processing data in accordance with a GP instruction set; (b) a digital signal processor (DSP) module for processing data in accordance with command-list code; and (c) means for addressing into a microcoated routine by using the entry point address as an opcode, thereby eliminating the need for an address decoder.
Claim 43
Dependent Claim
33 words
An integrated data processing system as in claim 23 and further comprising means for protecting against invalid op-codes that are implemented as entry point addresses by special "valid-entry" marking in each microcode line.
Claim 44
Dependent Claim
52 words
An integrated data processing system comprising: (a) a general purpose (GP) CPU core for processing data in accordance with a GP instruction set; (b) a digital signal processor (DSP) module for processing data in accordance with command-list code; and (c) means for implementing vector address pointer registers, including incrementation and wrap-around logic.
Claim 45
Dependent Claim
52 words
An integrated data processing system comprising: (a) a general purpose (GP) CPU core for processing data in accordance with a GP instruction set; (b) a digital signal processor (DSP) module for processing data in accordance with command-list code; and (c) means for implementing vector address pointer registers, including incrementation and wrap-around logic.
Claim 46
Dependent Claim
60 words
An integrated data processing system comprising: (a) a general purpose (GP) CPU core for processing data in accordance with a GP instruction set; (b) a digital signal processor (DSP) module for processing data in accordance with command-list code; and (c) means for specifying parameters for a vector operation by using part of the op code field from a parameters register.
Claim 47
Dependent Claim
60 words
An integrated data processing system comprising: (a) a general purpose (GP) CPU core for processing data in accordance with a GP instruction set; (b) a digital signal processor (DSP) module for processing data in accordance with command-list code; and (c) means for specifying parameters for a vector operation by using part of the op code field from a parameters register.
References Cited (Backward Citations)
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