Patent EP0541351A2 successfully refreshed from Google Patents.
EP0541351A2
Expired / Lapsed
EP
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D/A converter offset correction
Assignee: Nokia Oyj
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Filing: 1992-11-04
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Granted: —
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Expires: 2012-11-04
Abstract
Abstract An offset voltage zeroing method for a D/A converter, in which oscillations of the output voltage are radically reduced. An output signal of the converter is applied to a first terminal of a capacitor (5). A second terminal of the capacitor is coupled to a reference voltage (V ref ) by a controllable switch (6) as long as there are no pulses from the output of the converter. As a result, an offset-corrected output signal is obtained from the second terminal.
Inventors
- 👤 Risto Väisänen
- 👤 Jukka Sarasmo
Bibliographic Details
Application Number
—
Jurisdiction
EP
Data Source
google_patents
Last Synchronized
2026-11-03 17:28
CPC Classifications
H; H03; H03G; H03G3/00; H03G3/20; H03G3/30; H03G3/3036; H03G3/3042; H03G3/3047; H03M; H03M1/00; H03M1/06; H03M1/0602; H03M1/0604; H03M1/0607; H03M1/66
Claims Analysis
Total Claims: 9
Claim 1
Independent Claim
81 words
A method of correcting offset voltage variations of a Digital-to-Analogue (D/A) converter which generates a pulse-like output signal, characterized in that the output signal is applied to a first terminal of a capacitor (5) , and that the second terminal is coupled to a reference voltage (V ref ) with a controllable switch (6) as long as there are no pulses from the output of the converter, whereby a modified output signal is obtained from a second terminal of the capacitor.
Claim 2
Dependent Claim
98 words
Circuitry for correcting the effect of variation of offset voltages of a D/A converter from a burst mode output signal of the converter, characterized in that the output of the converter is coupled to a first terminal of a capacitor (5), the second terminal of the capacitor (5) being coupled to a controllable switch (6) which, in the closed position couples the second terminal with a reference voltage (V ref ) and in the open position disconnects the reference voltage from the second terminal, whereby a corrected output signal is obtained from the second terminal of the capacitor.
Claim 3
Dependent Claim
30 words
Circuitry according to claim 2, characterized in that the control voltage of the switch is pulse-like and it starts and ends substantially simultaneously with the pulse of an A/D converter.
Claim 4
Dependent Claim
26 words
Circuitry according to claim 3, characterized in that the controllable switch is closed as long as there are no pulses from the output of the converter.
Claim 5
Dependent Claim
34 words
Circuitry according to claim 4, characterized in that the controllable switch (12) couples the second terminal of the capacitor (5) and the reference voltage (V ref ) in response to a positive control voltage.
Claim 6
Dependent Claim
42 words
Circuitry according to claim 5, characterized in that a control voltage pulse is applied to the switch (12) when the voltage value of the pulse is substantially zero or provided with an opposite sign relative to the pulse of the A/D converter.
Claim 7
Dependent Claim
37 words
Circuitry according to claim 5, characterized in that a control voltage pulse is applied inverted to the switch (12) when the voltage value of said pulse is of equal sign as the pulse of the A/D converter.
Claim 8
Dependent Claim
57 words
A radio telephone transmitter comprising a power amplifier, and offset correction circuitry claimed in any of claims 2 to 7, wherein an output signal (TXC-D/A) of an A/D converter is used as a control signal for the power amplifier, and the control signal of the controllable switch is a square wave pulse (TXP) to be summed therewith.
Claim 9
Dependent Claim
20 words
A radio telephone transmitter as claimed in claim 8, adapted for use in a time division multiple access (TDMA) system.
References Cited (Backward Citations)
No citation records indexed.
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