Patent EP0530760A2 successfully refreshed from Google Patents.
EP0530760A2
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Dynamic memory allocation for frame buffer for spatial light modulator
Assignee: Texas Instruments Inc
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Filing: 1992-09-02
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Granted: —
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Expires: 2012-09-02
Abstract
Abstract A frame buffer (16) for a spatial light modulator (17) in a image display system. The frame buffer (16) is comprised of video random access memory devices (VRAM's) having sections of VRAM rows that receive a value from one bit position of all display rows. An allocation circuit (15) provides addresses for filling said VRAM rows when data is being written to the frame buffer (16), updates an address memory as VRAM rows are emptied, and provides addresses for mapping VRAM rows to display rows of the spatial light modulator (17) when data is being read out of the frame buffer (16). <IMAGE>
Inventors
- 👤 Paul M. Urbanus
Bibliographic Details
Application Number
—
Jurisdiction
EP
Data Source
google_patents
Last Synchronized
2026-11-09 12:41
CPC Classifications
H; H04; H04N; H04N3/00; H04N3/10; H04N3/12; H04N5/00; H04N5/74; G; G09; G09G; G09G3/00; G09G3/20; G09G3/34; G09G2360/00; G09G2360/18; G09G3/2092
Claims Analysis
Total Claims: 14
Claim 1
Independent Claim
163 words
A display arrangement for storing and displaying data representing rows and columns of a graphic image, comprising: a spatial tight modulator including pixels arranged in rows and columns for receiving data representing rows of an image and for reproducing said image from said data; and a video random access frame memory for storing incoming data, having control and addressing lines, such that said data may be read into sections of memory rows, wherein each of said sections stores data representing one bit-frame of data; and a memory allocation circuit for dynamically allocating memory spaces of said frame memory, said allocation circuit having a first-in first out (FIFO) memory for storing a list of available memory rows, a mapping memory for mapping memory rows to display rows of said spatial light modulator, and a controller for fetching available memory rows from said FIFO memory, and for controlling the filling of memory rows, and for saving addresses of filled memory rows in said mapping memory;
Claim 2
Dependent Claim
36 words
The display arrangement of Claim 1, wherein said memory allocation circuit further has an input bit selector for selecting a memory row in accordance with the current bit position from each current pixel being read in.
Claim 3
Dependent Claim
39 words
The display arrangement of Claim 1 or Claim 2, wherein said memory allocation circuit further has an input row counter and an input column counter for providing an address in said memory when data is loaded into said memory.
Claim 4
Dependent Claim
43 words
The display arrangement of Claim 1, Claim 2 or Claim 3, wherein said memory allocation circuit further has an output bit selector and an output row counter for providing a row address in said memory when data is being downloaded from said memory.
Claim 5
Dependent Claim
31 words
The display arrangement of any preceding claim and further comprising a switch for providing an address to said mapping memory depending on whether said frame buffer is being loaded or downloaded.
Claim 6
Dependent Claim
35 words
A display arrangement as claimed in any preceding claim and wherein said mapping memory is in communication with said FIFO such that as a memory row is downloaded, its address is placed in said FIFO.
Claim 7
Dependent Claim
49 words
A display arrangement as claimed in any preceding claim and including a switch for providing a memory address to said frame memory, with the value of said address depending on whether said frame memory is to be loaded with incoming display data or downloaded to said spatial light modulator.
Claim 8
Dependent Claim
23 words
A display arrangement as claimed in any preceding claim and wherein each section stores one bit position from a number of display rows.
Claim 9
Dependent Claim
85 words
A graphical display system including a display arrangement as claimed in any preceding claim and further including: a receiver capable of receiving a signal containing video information; a tuner in communication with said receiver for receiving said signal from said receiver and for isolating the video component of said signal; a processor in communication with said tuner for converting said video component into a set of data for use with said spatial light modulator; a light source and an optics system for projecting said image.
Claim 10
Independent Claim
166 words
A method of using a video random access memory frame buffer with a spatial light modulator, comprising the steps of: loading incoming display data into a video random access memory frame buffer, such that it may be read out from said frame buffer in bit-frames, on the basis of rows of said memory; input mapping the location of pixel data from said incoming display data, in terms of display bits, columns, and rows, to locations of said memory, in terms of memory layers, rows, and columns, as said data is loaded; maintaining a record of said memory rows as they are read out of said frame memory, such that each memory row is made available for re-use after its data is downloaded; re-using said memory rows for incoming display data as they become available after the data from those rows has been downloaded; and output mapping the location of memory layers, rows, and columns to display rows and columns as bit-frames of said data are downloaded.
Claim 11
Dependent Claim
46 words
The method of Claim 10, wherein said loading step is accomplished by loading successive bits for each pixel in different memory rows, loading successive display columns for each row in different memory bits and layers, and loading successive display rows in different memory blocks and rows.
Claim 12
Dependent Claim
38 words
The method of Claim 10 or Claim 11, wherein said input mapping step is accomplished by obtaining addresses from an input row counter and an input column counter, which increment for each new incoming display row and column.
Claim 13
Dependent Claim
45 words
The method of Claim 10, Claim 11 or Claim 12, wherein said output mapping step is accomplished by obtaining addresses from an output bit selector that increments for each new bit-frame and an output row counter that increments for each new row to be displayed.
Claim 14
Dependent Claim
14 words
Apparatus for performing a method as claimed in any of claims 10 to 13.
References Cited (Backward Citations)
No citation records indexed.
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