Patent EP0521634B1 successfully refreshed from Google Patents.
EP0521634B1
Expired / Lapsed
EP
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Improved thermal inkjet printhead structure and method for making the same
Assignee: HP Inc
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Filing: 1992-06-17
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Granted: 1996-04-24
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Expires: 2012-06-17
Abstract
No abstract record available.
Inventors
- 👤 Duane A. Fasen
- 👤 Jerome E. Beckmann
- 👤 John H. Stanback
- 👤 Ulrich E. Hess
- 👤 Larry S. Metz
- 👤 Charles E. Moore
- 👤 James R. Hulings
Bibliographic Details
Application Number
—
Jurisdiction
EP
Data Source
google_patents
Last Synchronized
2026-11-07 21:34
CPC Classifications
B; B41; B41J; B41J2/00; B41J2/005; B41J2/01; B41J2/135; B41J2/14; B41J2/14016; B41J2/14088; B41J2/14112; B41J2/14129; B41J2/16; B41J2/1601; B41J2/1603; B41J2/1621; B41J2/1626; B41J2/1628; B41J2/1629; B41J2/1631; B41J2/164; B41J2/1642; B41J2/1646; B41J2202/00; B41J2202/01; B41J2202/03; B41J2202/13; Y; Y10; Y10T; Y10T29/00; Y10T29/49; Y10T29/49401
Claims Analysis
Total Claims: 10
Claim 1
Independent Claim
415 words
A thermal inkjet printhead apparatus having at least one MOSFET drive transistor (126) integrated thereon comprising: a substrate (70) comprised of silicon; a MOSFET transistor (126) positioned on said substrate (70), said transistor (126) comprising a source region (118), a drain region (120), and a gate (110) positioned between said source region (118) and said drain region (120), said gate (110) comprising: a layer (72) of silicon dioxide on said substrate (70); a layer of silicon nitride (76) on said layer (72) of silicon dioxide; and a layer (90) of polycrystalline silicon on said layer (76) of silicon nitride; a field oxide layer (84, 86) on said substrate (70), said field oxide layer (84, 86) surrounding said transistor (126) and being comprised of silicon dioxide; a layer (124) of dielectric material covering said field oxide layer (84, 86) and said transistor (126), said layer (124) of dielectric material having a plurality of openings (174, 176, 177) therethrough, said openings (174, 176, 177) providing access to said source region (118), said drain region (120), and said gate (110) of said transistor (126); a layer (180) of electrically resistive material positioned on said layer (124) of dielectric material, said layer of electrically resistive material (180) being in direct electrical contact with said source region (118), said drain region (120), and said gate (110) through said openings (174, 176, 177); a layer (181) of conductive material affixed to a portion of said layer (180) of electrically resistive material in order to form a multi-layer structure (182), said layer (180) of electrically resistive material in said multi-layer structure (182) having at least one uncovered section (202) wherein said layer (181) of conductive material is absent therefrom, said uncovered section (202) functioning as a heating resistor (209), said layer (180) of electrically resistive material being covered with said layer (181) of conductive material at said source region (118), said drain region (120), and said gate (110) of said transistor (126); a portion (220) of protective material positioned on said heating resistor (209); and a plate member (240) having at least one opening (242) therethrough, said plate member (240) being secured to said portion (220) of protective material, said portion (220) of protective material having a section thereof removed directly beneath said opening (242) through said plate member (240) in order to form an ink receiving cavity (250) thereunder, said heating resistor (209) being positioned beneath and in alignment with said ink receiving cavity (250) in order to impart heat thereto.
Claim 2
Dependent Claim
112 words
A thermal inkjet printhead apparatus in accordance with Claim 1 wherein: said layer (90) of polycrystalline silicon further comprises an upper surface (96) and a lower surface (94), said lower surface (94) being adjacent said layer (90) of silicon nitride, said layer (90) of polycrystalline silicon continuously decreasing in width from said lower surface (94) to said upper surface (96) thereof; said layer (180) of electrically resistive material further being comprised of a composition selected from the group consisting of polycrystalline silicon, and a mixture of tantalum and aluminium; and said layer (181) of conductive material further being comprised of a material selected from the group consisting of aluminium, copper and gold.
Claim 3
Dependent Claim
48 words
A thermal inkjet printhead apparatus in accordance with Claim 1 comprising: a housing (25,49), secured to and in fluid communication with said printhead, said housing having at least one outlet (26,50) therethrough; and storage means (22,44) within said housing 25,49( for retaining a supply of liquid ink therein.
Claim 4
Dependent Claim
112 words
A thermal inkjet printhead apparatus in accordance with Claim 1 wherein said portion (220) of protective material further comprises: a first passivation layer (222) positioned on said resistor (209), said first passivation layer (222) being comprised of silicon nitride; a second passivation layer (223) positioned on said first passivation layer (222), said second passivation layer (223) being comprised of silicon carbide; a cavitation layer (224) positioned on said second passivation layer (223), said cavitation layer (224) being comprised of a metal selected from the group consisting of tantalum, tungsten, and molybdenum; and an ink barrier layer (230) positioned on said cavitation layer (224), said ink barrier layer (230) being comprised of plastic.
Claim 5
Independent Claim
488 words
A method for manufacturing a thermal inkjet printhead apparatus having at least one MOSFET drive transistor (126) integrated thereon comprising the steps of: providing a substrate (70) comprised of silicon; forming a layer (72) of silicon dioxide on said substrate (70); forming a layer (76) of silicon nitride on said layer (72) of silicon dioxide; removing a portion of said layer (76) of silicon nitride so as to leave a section (79) of silicon nitride remaining intact on said layer (72) of silicon dioxide, said section (79) of silicon nitride being surrounded by a plurality of exposed regions (80, 82) of said layer (72) of silicon dioxide; oxidizing said substrate (70) beneath said exposed regions (80, 82) of said layer (72) of silicon dioxide in order to form a field oxide layer (84, 86) surrounding said section (79) of silicon nitride; forming a layer (90) of polycrystalline silicon on said section (79) of silicon nitride, said layer (90) of polycrystalline silicon, said section (79) of silicon nitride, and said layer (72) of silicon dioxide thereunder together forming a gate (110) of said transistor (126); forming a transistor source region (118) and a transistor drain region (120) within said substrate (70) adjacent said gate (110); applying a layer (124) of dielectric material onto said field oxide layer (84, 86), said gate (110), said source region (118), and said drain region (120); forming a plurality of openings (174, 176, 177) through said layer (124) of dielectric material in order to provide access to said gate (110), said source region (118), and said drain region (120); applying a layer (180) of electrically resistive material onto said layer (124) of dielectric material, said layer (180) of electrically resistive material being in direct electrical contact with said gate (110), said source region (118), and said drain region (120) through said openings (174, 176, 177); applying a layer (181) of conductive material onto said layer (180) of electrically resistive material in order to form a multi-layer structure (182), said layer (181) of electrically resistive material in said multi-layer structure (182) having at least one uncovered section (202) wherein said layer (181) of conductive material is absent therefrom, said uncovered section (202) functioning as a heating resistor (209), said layer (180) of electrically resistive material being covered with said layer (181) of conductive material at said source region (118), said drain region (120), and said gate (110) of said transistor (126); applying a portion (220) of protective material onto said resistor (209); and securing a plate member (240) having at least one opening (242) therethrough onto said portion (220) of protective material, said portion (220) of protective material having a section thereof removed directly beneath said opening (242) through said plate member (240) in order to form an ink receiving cavity (250) thereunder, said heating resistor (209) being positioned beneath and in alignment with said ink receiving cavity (250) in order to impart heat thereto.
Claim 6
Dependent Claim
80 words
A method in accordance with the method of Claim 5 wherein said layer (90) of polycrystalline silicon includes an upper surface (96) and a lower surface (94), said lower surface (94) being adjacent said section (79) of silicon nitride, said forming of said layer (90) of polycrystalline silicon further comprises the step of etching said polycrystalline silicon so that said layer (90) of polycrystalline silicon continuously decreases in width from said lower surface (94) to said upper surface (96) thereof.
Claim 7
Dependent Claim
75 words
A method in accordance with the method of Claim 5 further comprising the steps of: providing a housing (25,49) having storage means (22,44) therein for retaining a supply of liquid ink, said housing (25,49) further comprising at least one outlet (26,50) therethrough; and securing said housing (25,49) to said substrate (70) at a position thereon so that said ink receiving cavity (250) is in fluid communication with said storage means (22,44) through said outlet (26,50).
Claim 8
Dependent Claim
96 words
A method in accordance with the method of Claim 5 where said step of applying a portion (220) of protective material further comprises the steps of: applying a first passivation layer (222) comprised of silicon nitride onto said resistor (209); applying a second passivation layer (223) comprised of silicon carbide onto said first passivation layer (222); applying a cavitation layer (224) comprised of a metal selected from the group consisting of tantalum, tungsten, and molybdenum onto said second passivation layer (223); and applying an ink barrier layer (23) comprised of plastic onto said cavitation layer (224).
Claim 9
Independent Claim
53 words
The apparatus or method of claims 1, 3, 5, or 7 wherein said layer (90) of polycrystalline silicon of said gate (110) comprises an upper surface (96) and a lower surface (94), said layer (90) of polycrystalline silicon continuously decreasing in width from said lower surface (94) to said upper surface (96) thereof.
Claim 10
Independent Claim
39 words
The apparatus or method of claims 1, 2, 3, 4, 5, 6, 7, or 8 wherein said source region (118) and said drain region (120) of said transistor (126) each have a thickness of about 1.25 - 1.75 microns.
References Cited (Backward Citations)
No citation records indexed.
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