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EP0509376A2 Expired / Lapsed EP ⏱️ 0.0 years remaining

Signal processing device

Assignee: Hitachi Ltd
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Filing: 1992-04-07
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Granted: —
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Expires: 2012-04-07
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Abstract

Abstract A signal processing device comprising a plurality of signal processing circuits (3, 4, 5) for executing a plurality of predetermined signal processing stages, respectively which are integrated on a monolithic semiconductor chip. The signal processing device further comprises a plurality of signal input terminals (301, 401, 501), connected with predetermined signal processing circuits among said plurality of signal processing circuits, for externally receiving input signals necessary for said plurality of signal processing stages, respectively, first signal output means (502) for outputting the final signal processing result obtained from the signal processing circuit (5) for performing the final signal processing stage among said plurality of signal processing circuits, and second signal output means (302, 402) for outputting the intermediate processing results obtained from the signal processing circuits (3, 4) other than said signal processing circuit for performing the final stage signal processing stage among said plurality of signal processing circuits, respectively. The signal processing device further comprises a plurality of selection means (6, 7, 8) each located on each of signal transfer paths for transferring the intermediate signal processing result outputted from the intermediate signal processing circuit, which is other than said signal processing circuit for performing the final signal processing stage among said plurality of signal processing circuits, to the signal processing circuit for performing the succeeding signal processing stage, said selection means being provided with supplemental signal input terminals (601, 701, 801) for externally receiving signals, respectively, each of said selection means serving to select either of the intermediate signal processing result and the signal received at each of the supplemental signal input terminals on the basis of a predetermined control signal so that a selected signal is supplied to the succeeding signal processing circuit.

Inventors

  • 👤 Nobukazu Doi
  • 👤 Tohru Setoyama

Bibliographic Details

Application Number —
Jurisdiction EP
Data Source google_patents
Last Synchronized 2026-11-08 16:32
CPC Classifications
H; H03; H03K; H03K19/00; H03K19/02; H03K19/173; G; G06; G06F; G06F17/00; G06F17/10; G06F15/00; G06F15/76; G06F15/78; G06F15/7839; G06F15/7842; G06F15/80; G06F15/8007; G06F15/8015

Claims Analysis

Total Claims: 8
Claim 1
Independent Claim 272 words
A signal processing device integrated on a monolithic semiconductor chip comprising: a plurality of signal processing circuits (3, 4, 5) for executing a plurality of predetermined signal processing stages, respectively; a plurality of signal input terminals (301, 401, 501), connected with predetermined signal processing circuits among said plurality of signal processing circuits, for externally receiving input signals necessary for said plurality of signal processing stages, respectively; first signal output means (502) for outputting the final signal processing result obtained from the signal processing circuit (5) for performing the final signal processing stage among said plurality of signal processing circuits; second signal output means (302, 402) for outputting the intermediate processing results obtained from the signal processing circuits (3, 4) other than said signal processing circuit for performing the final stage signal processing stage among said plurality of signal processing circuits, respectively; and a plurality of selection means (6, 7, 8) each located on each of signal transfer paths for transferring the intermediate signal processing result outputted from the intermediate signal processing circuit, which is other than said signal processing circuit for performing the final signal processing stage among said plurality of signal processing circuits, to the signal processing circuit for performing the succeeding signal processing stage, said selection means being provided with supplemental signal input terminals (601, 701, 801) for externally receiving signals, respectively, each of said selection means serving to select either of the intermediate signal processing result and the signal received at each of the supplemental signal input terminals on the basis of a predetermined control signal so that a selected signal is supplied to the succeeding signal processing circuit.
Claim 2
Dependent Claim 54 words
A signal processing device according to claim 1, further comprising means (30, 31, 32, 33, 34) for placing said first signal output means (502) and said second signal output means (302, 402) in a high impedance state on the basis of a predetermined control signal applied to said first and second signal output means.
Claim 3
Dependent Claim 47 words
A signal processing device according to claim 1, wherein a package (21) for molding said monolithic semiconductor chip (20) is connected with said monolithic semiconductor chip (20) by wirings the number of which is smaller than that of bonding pads (22) of said monolithic semiconductor chip (20).
Claim 4
Dependent Claim 92 words
A signal processing device according to claim 1, further comprising a subordinate signal processing circuit (42) formed on the same monolithic semiconductor chip, wherein said first signal output means (502) and said second signal output means (302, 402) are connected with said subordinate signal processing circuit (42), and said selection means receive the intermediate signal processing result and the signal outputted from said subordinate signal processing circuit and select either of them on the basis of said control signal so that a selected signal is supplied to the succeeding signal processing circuit.
Claim 5
Dependent Claim 33 words
A signal processing device according to claim 4, wherein said subordinate signal processing circuit (42) is provided with signal I/O means (43, 44) for individually performing input/output of signals for an external device.
Claim 6
Dependent Claim 29 words
A signal processing device according to claim 4, wherein said subordinate circuit (42) is designed by at least one of a gate array, a programmable logic and an EPROM.
Claim 7
Dependent Claim 54 words
A signal processing device according to claim 4, further comprising means (30, 31, 32, 33, 34) for placing said first signal output means (502) and said second signal output means (302, 402) in a high impedance state on the basis of a predetermined control signal applied to said first and second signal output means.
Claim 8
Dependent Claim 47 words
A signal processing device according to claim 4, wherein a package (21) for molding said monolithic semiconductor chip (20) is connected with said monolithic semiconductor chip (20) by wirings the number of which is smaller than that of bonding pads (22) of said monolithic semiconductor chip (20).

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