Patent EP0495574A2 successfully refreshed from Google Patents.
EP0495574A2
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Multi-mode terminal system
Assignee: National Semiconductor Corp
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Filing: 1992-01-07
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Granted: —
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Expires: 2012-01-07
Abstract
Abstract A multi-mode terminal system utilizes a single embedded processor (14) and a single RAM (12) for performing modem operations, graphics/video processing and general purpose control tasks. The display lists, frame buffer, font area, and embedded processor memory are located in the same single random access memory, thus allowing the use of a single RAM for DSP data, display lists, video buffers, voice compression/decompression algorithms and embedded controller tasks. The system is adaptable for programming the desired video standard, modem type and display list format. Since both the video function and the embedded processor are supported by the same RAM, a RAM arbiter (18) resolves bus contention.
Inventors
- 👤 Maurice Valentaten
- 👤 Bernd Moeschen
- 👤 Yehezkel Friedman
- 👤 Yom-Tov Sidi
- 👤 Zeev Bikowsky
- 👤 Zohar Peleg
Bibliographic Details
Application Number
—
Jurisdiction
EP
Data Source
google_patents
Last Synchronized
2026-11-02 05:12
CPC Classifications
H; H04; H04N; H04N7/00; H04N7/14; H04N7/141; H04N7/148; G; G06; G06F; G06F3/00; G06F3/14
Claims Analysis
Total Claims: 13
Claim 1
Independent Claim
170 words
A multi-mode terminal system for recovering video/graphics information received from a communications medium for display on an associated output device, the terminal system comprising: line interface means (21) for converting the video/graphics information received from the communications medium to a corresponding digital signal; an embedded processor (14) for processing the digital signal to generate bit map frame buffer data and corresponding attributes frame buffer data; video processor means (16) for processing the bit map frame buffer data and attributes frame buffer data to generate display data that is provided to the output device; and a shared RAM array (12) for storing digital data, the digital data including the bit map frame buffer data and the attributes frame buffer data, and connected for access by both the embedded processor and the video processor means such that the embedded processor may access digital data stored in the shared RAM array and the video processor means may retrieve bit map frame buffer data and attributes frame buffer data from the shared RAM array.
Claim 2
Dependent Claim
25 words
A terminal system according to claim 1 wherein a control for the storing of the buffer data is located in the video processor means (16).
Claim 3
Dependent Claim
27 words
A terminal system according to claim 1 wherein a control for the storing of the buffer data is an access mechanism located in the embedded processor (14).
Claim 4
Dependent Claim
19 words
A terminal system according to any foregoing claim wherein the output device comprises a display monitor or a printer.
Claim 5
Dependent Claim
25 words
A terminal system according to any foregoing claim wherein the shared RAM array comprises a DRAM array, such as a VRAM, or a SRAM array.
Claim 6
Dependent Claim
45 words
A terminal system according to any foregoing claim wherein the video processor means (16) includes a RAM arbiter (18) responsive to access addresses issued by the embedded processor (14) to arbitrate accesses to the RAM array by the embedded processor and the video processor means.
Claim 7
Dependent Claim
116 words
A terminal system according to claim 6 wherein the video processor means further comprises: a fetch machine (40) for retrieving bit map frame buffer data and corresponding attributes frame buffer data from the RAM array; a bit map FIFO (42) for storing the bit map frame buffer data retrieved by the fetch machine; line buffer storage means (44) for storing the corresponding attributes frame buffer data retrieved by the fetch machine; and mix video processor means (46) for translating the bit map frame buffer data stored in the bit map FIFO and the corresponding attributes frame buffer data stored in the line buffer storage means to the display data that is provided to the output device.
Claim 8
Dependent Claim
22 words
A terminal system according to any foregoing claim wherein the output device is adapted to display R, G, B screen component data.
Claim 9
Dependent Claim
82 words
A terminal system according to any foregoing claim and adapted for recovering the said video/graphics information received from an analog communications medium, the system including: an analog front end (22) for receiving a modulated analog video/graphics input signal from the analog communications medium and converting the analog video/graphics input signal to a corresponding serial digital input signal; the line interface means being arranged for converting the serial digital input signal to a parallel digital input signal for use by the embedded processor.
Claim 10
Dependent Claim
21 words
A terminal system according to any foregoing claim wherein the embedded processor (14) includes means for performing general purpose processor tasks.
Claim 11
Dependent Claim
16 words
A terminal system according to any foregoing claim and further including means for processing voice data.
Claim 12
Independent Claim
134 words
A method of processing video/graphics information received from a communications medium for display on an associated output device, the method comprising: (a) converting the video/graphics information received from the communications medium to a corresponding parallel digital input signal; (b) processing the parallel digital input signal to generate bit map frame buffer data and corresponding attributes frame buffer data; (c) storing the bit map frame buffer data and the corresponding attributes frame buffer data in a shared RAM array; (d) retrieving the bit map frame buffer data and the corresponding attributes frame buffer data from the shared RAM array; and (e) processing the bit map frame buffer data and the corresponding attributes frame buffer data retrieved from the shared RAM array to generate display data; and (f) providing the display data to the output device.
Claim 13
Independent Claim
170 words
A method of processing video/graphics information received from an analog communications medium for display on an associated monitor, the method comprising: (a) converting an analog video/graphics input signal received from the analog communications channel to a corresponding serial digital input signal; (b) translating the serial digital input signal to a corresponding parallel digital input signal; (c) processing the parallel digital input signal to generate a corresponding display list; (d) storing the display list in a shared RAM array; (e) retrieving the display list from the shared RAM array and processing the display list to generate bit map frame buffer data and corresponding attributes frame buffer data; (f) storing the bit map and corresponding attributes frame buffer data in the shared RAM array; (g) retrieving the bit map and corresponding attributes frame buffer data from the shared RAM array and processing the bit map and corresponding attributes frame buffer data to generate R, G, B screen components data; and (h) providing the R, G, B screen components data to the monitor.
References Cited (Backward Citations)
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