Patent EP0492812A2 successfully refreshed from Google Patents.
EP0492812A2
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Error detection and framing in packets transmitted in a sequence of fixed-length cells
Assignee: AT&T Inc
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Filing: 1991-11-28
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Granted: —
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Expires: 2011-11-28
Abstract
Abstract A digital error check sequence for detecting errors in messages. The error check sequence has a form such that it is distinguishable from a sequence of padding bits, and can thus be employed to both mark the end of the message and determine whether there was an error in the transmission of the message. In one embodiment, the error check sequence includes a single-bit first field and a cyclic redundancy code (CRC) whose least significant bit is always 1. The value of the first field is chosen such that when it is appended to the message, the result is a CRC with a least significant bit of 1. Also disclosed are methods and apparatus for generating the error check sequence and transmission and receiving systems employing the error check sequence. <IMAGE>
Inventors
- 👤 Joseph Henry Condon
Bibliographic Details
Application Number
—
Jurisdiction
EP
Data Source
google_patents
Last Synchronized
2026-11-07 19:13
CPC Classifications
H; H04; H04L; H04L1/00; H04L1/004; H04L1/0056; H04L1/0057; H04Q; H04Q11/00; H04Q11/04; H04Q11/0428; H04Q11/0478; H04L12/00; H04L12/54; H04L12/56; H04L12/5601; H04L2012/5638; H04L2012/5646; H04L2012/5647
Claims Analysis
Total Claims: 13
Claim 1
Independent Claim
140 words
A method for sending a variable-length digital message (103) in a sequence of one or more fixed-length cells (107) characterized by the steps of: placing the digital message in the fixed length cells until at least the remainder of the message and a digital error check sequence (407) will fit in a single one of the cells; marking the cell which is to contain the remainder of the message and the digital error check sequence as the last cell; computing the digital error check sequence such that the end of the digital error check sequence is always distinguishable from a padding sequence (111); and placing in the cell marked as the last cell the remainder of the message, the digital error check sequence, and, to the extent required to fill the cell marked as the last cell, the padding sequence,
Claim 2
Dependent Claim
44 words
The method set forth in claim 1 further characterized in that: the step of computing the digital error check sequence is performed such that the number of bits in the padding sequence does not affect error checking computations using the digital error check sequence.
Claim 3
Dependent Claim
40 words
The method set forth in claim 1 further characterized in that: the step of computing the digital error check sequence is performed such that the least significant bit (413) of the digital error check sequence always has a predetermined value.
Claim 4
Dependent Claim
54 words
The method set forth in claim 3 further characterized in that the step of computing the digital error check sequence further comprises the step of: adding a least significant bit determining portion (409) to the digital error check sequence which determines the value of the least significant bit of the digital error check sequence.
Claim 5
Dependent Claim
92 words
The method set forth in claim 4 further characterized in that the step of computing the digital error check sequence further comprises the steps of: determining a value for the least significant bit determining portion such that the least significant bit of a first cyclic redundancy code computed for the message with the least significant bit determining portion appended thereto has the predetermined value; appending the least significant bit determining portion to the message; and computing the first cyclic redundancy code for the message with the appended least significant bit determining portion.
Claim 6
Dependent Claim
34 words
The method set forth in claim 5 further characterized in that: the step of determining a value for the least significant bit determining portion determines a value such that the predetermined value is 1.
Claim 7
Dependent Claim
65 words
The method set forth in claim 6 further characterized in that the step of determining a value includes the steps of: computing a second cyclic redundancy code for the message without the appended least significant bit determining portion; and if the most significant bit of the second cyclic redundancy code is 1, setting the least significant bit determining portion to 0 and otherwise to 1.
Claim 8
Dependent Claim
31 words
The method set forth in claim 7 further characterized in that: the step of computing the digital error checking sequence is done such that the padding sequence consists of 0 bits.
Claim 9
Dependent Claim
37 words
Transmission apparatus for providing a viable-length packet (101) to a transmission medium, the apparatus being characterized in that: the packet comprises a variable-length message (103); and a digital error check sequence (407) having a predetermined pattern (413).
Claim 10
Dependent Claim
59 words
The apparatus set forth in claim 9 further characterized in that: the digital error check sequence comprises a first cyclic redundancy code (411) having the predetermined pattern; and a pattern determining portion (409) whose value is such that the cyclic redundancy code produced from the message with the pattern determining portion appended thereto is the first cyclic redundancy code.
Claim 11
Dependent Claim
32 words
The apparatus set forth in claim 10 further characterized in that: the predetermined pattern is a least significant bit having a predetermined value; and the pattern determining portion is a single bit.
Claim 12
Dependent Claim
63 words
The apparatus set forth in claim 11 further characterized in that: the predetermined value is 1; and the value of the pattern determining portion is determined such that when the most significant bit of a second cyclic redundancy code for the message without the appended pattern determining portion is 1, the value of the pattern determining portion is 0 and is otherwise 1.
Claim 13
Dependent Claim
62 words
The apparatus set forth in claim 11 or claim 12 further characterized in that: the apparatus provides the packet in a sequence of fixed-length cells 107; and any padding (111) required in the last cell of the sequence consists of a sequence of 1 or more bits, each bit in the sequence of bits having a value other than the predetermined value.
References Cited (Backward Citations)
No citation records indexed.
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