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EP0487220A2
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SOI-Field effect transistor and method of manufacturing the same
Assignee: Mitsubishi Electric Corp
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Filing: 1991-10-31
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Granted: —
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Expires: 2011-10-31
Abstract
Abstract A semiconductor device includes a MOS-type field effect transistor (SOI-MOSFET) formed on a thin silicon layer (3) on an insulator layer (2). The SOI-MOSFET has a gate overlap-type LDD structure in which additional source/drain regions (7a, 8a) having an impurity concentration of 3x10¹⁷ to 3x10¹⁸/cm³ overlapping with a gate electrode (5) are provided in the silicon layer (3). According to this structure, when the SOI-MOSFET is on operation, only the additional source/drain regions (7a, 8a) are depleted, so that it is possible to obtain satisfactory transistor characteristics. Additional source/drain regions (7a, 8a) in this structure are formed by combination of vertical ion implantation using the gate electrode (5) as a mask and thermal diffusion or oblique ion implantation using the gate electrode (5) as a mask.
Inventors
- 👤 Yasuo c/o Mitsubishi Kabushiki Kaisha Yamaguchi
- 👤 Tadashi c/o Mitsubishi Kabushiki K. Nishimura
Bibliographic Details
Application Number
—
Jurisdiction
EP
Data Source
google_patents
Last Synchronized
2026-10-29 19:02
CPC Classifications
H; H10; H10D; H10D30/00; H10D30/01; H10D30/021; H10D30/031; H10D30/0321; H10D30/0323; H10D30/60; H10D30/67; H10D30/6704; H10D30/6706; H10D30/6713; H10D30/6715; H10D30/6719; H10P; H10P30/00; H10P30/20; H10P30/222
Claims Analysis
Total Claims: 16
Claim 1
Independent Claim
186 words
A semiconductor device comprising: a semiconductor layer (3) formed on an insulator (2) and having a thickness of 300Å to 1500Å; a gate electrode (5) formed on said semiconductor layer (3) with a gate insulating film (4) interposed therebetween; a pair of additional source/drain regions (7a, 8a) of a first conductivity type formed from immediately beneath both of the left and right side ends of said gate electrode (5) inward in said semiconductor layer (3) in a region immediately beneath said gate electrode (5); A channel forming region (6) of a second conductivity type formed in said semiconductor layer (3) in a region between said pair of additional source/drain regions (7a, 8a); and a pair of source/drain regions (7b, 8b) of the first conductivity type formed adjacent the ends opposite the sides of said additional source/drain regions (7a, 8a) in contact with said channel forming region (6) in said semiconductor layer (3); said additional source/drain regions (7a, 8a) having an impurity concentration of 3x10¹⁷ to 3x10¹⁸/cm³; and said source/drain regions (7b, 8b) having an impurity concentration higher than that of said additional source/drain regions (7a, 8a).
Claim 2
Dependent Claim
39 words
The semiconductor device according to claim 1, wherein said channel forming region (6) has a first conductivity-type impurity concentration of 10¹⁶ to 10¹⁷/cm³, and said source/drain regions (7b, 8b) has a second conductivity-type impurity concentration of 10¹⁹ to 10²⁰/cm³.
Claim 3
Dependent Claim
36 words
The semiconductor device according to claim 1, wherein said silicon layer (3) has a thickness of 1000Å to 1500Å, and said additional source/drain regions (7a, 7b) has a second conductivity-type impurity concentration of 3x10¹⁷ to 5x10¹⁷/cm³.
Claim 4
Dependent Claim
58 words
The semiconductor device according to claim 1, wherein said insulator (2) includes a silicon oxide film formed as buried by implanting oxygen ions, with a silicon layer (3) having a thickness of 300Å to 1500Å left from a main surface of silicon substrate (1), and to a predetermined depth from the lower surface of said silicon layer (3).
Claim 5
Dependent Claim
26 words
The semiconductor device according to claim 1, wherein said semiconductor layer (3) is a silicon layer formed in a shape of an island on insulator (2).
Claim 6
Dependent Claim
43 words
The semiconductor device according to claim 5, wherein said channel forming region (6) is a p-type region including boron, said additional source/drain regions (7a, 8a) are n-type regions including phosphorus, and said source/drain regions (7b, 8b) are n-type regions including phosphorus or arsenic.
Claim 7
Dependent Claim
35 words
The semiconductor device according to claim 6, wherein said channel forming region (6) has an impurity concentration of 10¹⁶ to 10¹⁷/cm³, and said source/drain regions (7b, 8b) have an impurity concentration of 10¹⁹ to 10²⁰/cm³.
Claim 8
Independent Claim
153 words
A method of manufacturing a semiconductor device comprising the steps of: forming a semiconductor layer (3) on an insulator (2); forming a gate insulating film (4) on said semiconductor layer (3); forming a gate electrode (5) on said gate insulating film (4); introducing impurities of a conductivity type immediately beneath the vicinity of the ends of said gate electrode (5) in said semiconductor layer (3) by implanting them from a predetermined direction making a predetermined angle of inclination with the surface of said semiconductor layer (3) using said gate electrode (5) as a mask to form additional source/drain regions (7a, 8a); and implanting impurities of the same conductivity type as that of the impurities implanted into said additional source/drain regions (7a, 8a) from a direction perpendicular to the surface of said semiconductor layer (3) into said semiconductor layer (3) using said gate electrode (5) as a mask to form source/drain regions (7b, 8b).
Claim 9
Dependent Claim
64 words
The method of manufacturing a semiconductor device according to claim 8, wherein said step of forming said additional source/drain regions (7a, 8a) includes the step of implanting impurities of said conductivity type from a predetermined direction making a predetermined angle of inclination with the surface of said semiconductor layer (3) with said semiconductor layer (3) rotated continuously in a plane parallel to its surface.
Claim 10
Dependent Claim
115 words
The method of manufacturing a semiconductor device according to claim 8, wherein said step of forming said additional source/drain regions (7a, 8a) includes; a first step of implanting impurities of said conductivity type from a predetermined direction making a predetermined angle of inclination with the surface of said semiconductor layer (3) with said semiconductor layer (3) kept still, and a second step of rotating said semiconductor layer (3) by 180° relatively to said direction of implanting impurities of said conductivity type in a plane parallel to its surface, and then implanting impurities of said conductivity type again from the same direction as the one in said first step with said semiconductor layer (3) kept still.
Claim 11
Independent Claim
112 words
A method of manufacturing a semiconductor device comprising the steps of: forming a semiconductor layer (3) on an insulator (2); forming a gate insulating film (4) on said semiconductor layer (3); forming a gate electrode (5) on said gate insulating film (4); introducing impurities of a first conductivity type by ion implantation using said gate electrode (5) as a mask; diffusing the implanted impurities of the first conductivity type beneath said gate electrode (5) by predetermined heat treatment to form additional source/drain regions (7a, 7b); and implanting impurities of said first conductivity type into said semiconductor layer (3) using said gate electrode (5) as a mask to form source/drain regions (7b, 8b).
Claim 12
Dependent Claim
43 words
The method of manufacturing a semiconductor device according to claim 11, wherein said predetermined heat treatment in said step of forming said additional source/drain regions (7a, 8a) is carried out in a nitrogen atmosphere at substantially 1000 o C. for a predetermined time.
Claim 13
Independent Claim
92 words
The method of manufacturing a semiconductor device according to either of claims 8 or 11, wherein said step of forming said semiconductor layer (3) on said insulator (2) includes the step of implanting oxygen ions into a main surface of a silicon substrate for forming a silicon oxide film (2) as buried to be said insulator (2), with a silicon layer (3) having a thickness of 300Å to 1500Å left from the main surface of said silicon substrate, and to a predetermined depth from the lower surface of said silicon layer (3).
Claim 14
Independent Claim
60 words
The method of manufacturing a semiconductor device according to either of claims 8 or 11, wherein said step of forming said semiconductor layer (3) on said insulator (2) includes the steps of: forming a silicon layer (3) in a shape of an island on said insulator (2), and implanting impurities of a second conductivity type into said silicon layer (3).
Claim 15
Dependent Claim
40 words
The method of manufacturing a semiconductor device according to claim 14, wherein said step of implanting impurities of the second conductivity type onto said silicon layer (3) includes the step of implanting boron to make the concentration 10¹⁶ to 10¹⁷/cm³.
Claim 16
Independent Claim
53 words
The method of manufacturing a semiconductor device according to either of claims 8 or 11, wherein phosphorus is implanted in said step of forming said additional source/drain regions (7a, 8a), and phosphorus or arsenic is implanted to make the concentration 10¹⁹ to 10²⁰/cm³ in said step of forming said source/drain regions (7b, 8b).
References Cited (Backward Citations)
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