Dielectrically isolated substrate and a process for producing the same

Claim 2

A dielectrically isolated substrate for use in integrated circuits, which comprises a single crystal silicon bond substrate having a (110) plane as a main crystal plane, and a single crystal silicon base substrate integrally bonded to said bond substrate, said bond substrate including a plurality of discrete, vertical moats and a plurality of parallelogramatical islands each positioned contiguous to each of said moats, each of said moats being formed by the use of a mask pattern of a parallelogramatical shape.

Claim 3

A process for producing a dielectrically isolated substrate for use in integrated circuits, which comprises the steps of: (a) coating a single crystal silicon bond substrate with a dielectric film, bringing the bond substrate into intimate contact with a single crystal silicon base substrate and heat-treating the same into a composite structure; (b) polishing the composite structure on a front surface of said bond substrate to a predetermined thickness; (c) forming an oxide film for photo-lithograpy over the polished surface of the bond substrate; (d) photo-lithographing the oxide film selectively with use of a mask pattern to thereby open a plurality of windows; (e) etching the bond substrate through the windows to thereby form a plurality of moats terminating at the dielectric film and a plurality of islands each positioned contiguous to each of the moats; (f) coating a dielectric isolation film onto the bond substrate; (g) depositing a polycrystalline silicon layer in a thickness onto the dielectric isolation film; (h) lapping the polycrystalline silicon layer until the surface of each of the islands is exposed; and (i) subsequently removing the dielectric isolation film, wherein the bond substrate has a (110) plane as a main crystal plane and is subjected to anisotropic etching under alkaline conditions whereby each of the moats has a substantially vertical wall communicating with the dielectric film, and each of the islands has a parallelogramatical shape.

Claim 4

The process according to claim 3 wherein the bond substrate is anisotropically etched by the use of a mask pattern positioned thereon in a parallelogramatical form, the mask pattern having two opposite pairs of sides, one pair of sides exteding vertically to one group of the 〈111〉 orientation of the junction substrate, and another pair of sides being vertical to another group of the 〈111〉 orientation, the mask pattern further including a plurality of compensating patterns on its corners.