Transmitter with nonlinearity correction circuit

Claim 2

A transmitter of claim 1, wherein the power amplifier possesses a small phase distortion characteristic.

Claim 3

A transmitter of claim 1, wherein the power amplifier comprises a transistor of emitter grounding or source grounding, a collector or a drain of the transistor being connected to the gain control terminal.

Claim 4

A transmitter of claim 1, wherein a Younger stage of the power amplifier comprises a source-grounded dual gate MOS FET, a second gate of the dual gate MOS FET being connected to the gain control terminal.

Claim 5

A transmitter of claim 1, wherein the first detector for generating the transmission envelope signal and the second detector for generating the reference envelope signal are identical circuits, and matched in characteristics.

Claim 6

A transmitter comprising: a power amplifier having a gain control terminal for amplifying an input modulation carrier signal to obtain a transmission signal; a transmission monitor circuit for picking up a part of the transmission signal from the power amplifier as a monitor signal; a first detector for detecting an envelope of the monitor signal to obtain a transmission envelope signal; a linear amplifier having a gain control terminal for linearly amplifying the input modulation carrier signal; a second detector for detecting an envelope of the modulation carrier signal amplified by the linear amplifier to obtain a reference envelope signal; a second error detector for comparing the reference envelope signal with a reference voltage to generate a second error signal; a sample hold circuit connected to the second error detector for sampling/holding the second error signal by a sample/hold signal supplied from outside, and for supplying its output to the gain control terminal of the linear amplifier to control a gain of the linear amplifier; and a first error detector for comparing the reference envelope signal and the transmission envelope signal to generate a first error signal, and for supplying the first error signal to the gain control terminal of the power amplifier, thereby controlling a gain of the power amplifier.

Claim 7

A transmitter of claim 6, wherein the power amplifier possesses a small phase distortion characteristic.

Claim 8

A transmitter of claim 6, wherein the power amplifier comprises a transistor of emitter grounding or source grounding, a collector or a drain of the transistor being connected to the gain control terminal.

Claim 9

A transmitter of claim 6, wherein a Younger stage of the power amplifier comprises a source-grounded dual gate MOS FET, a second gate of the dual gate MOS FET being connected to the gain control terminal.

Claim 10

A transmitter of claim 6, wherein the first detector for generating the transmission envelope signal and the second detector for generating the reference envelope signal are identical circuits, and matched in characteristics.

Claim 11

A transmitter comprising: a power amplifier having a gain control terminal for amplifying an input modulation carrier signal to obtain a transmission signal; a transmission monitor circuit for picking up a part of the transmission signal from the power amplifier as a monitor signal; a first detector for detecting an envelope of the monitor signal to obtain a transmission envelope signal; a linear amplifier having a gain control terminal for linearly amplifying the input modulation carrier signal; a second detector for detecting an envelope of the modulation carrier signal amplified by the linear amplifier to obtain a reference envelope signal; a second error detector for comparing the reference envelope signal with a reference voltage to generate a second error signal; a sample hold circuit connected to the second error detector for sampling/holding the second error signal by a sample /hold signal supplied from outside, and for supplying its output to the gain control terminal of the linear amplifier to control a gain of the linear amplifier; an envelope control signal generator connected to the second detector for multiplying the reference envelope signal by a burst contgrol signal supplied from outside, and for delivering a burst-form reference envelope signal as an envelope control signal; and a first error detector for comparing the envelope control signal and the transmission envelope signal to generate a first error signal, and for supplying the first error signal to the gain control terminal of the power amplifier, thereby controlling a gain of the power amplifier.

Claim 12

A transmitter of claim 11, wherein the power amplifier possesses a small phase distortion characteristic.

Claim 13

A transmitter of claim 11, wherein the power amplifier comprises a transistor of emitter grounding or source grounding, a collector or a drain of the transistor being connected to the gain control terminal.

Claim 14

A transmitter of claim 11, wherein a Younger stage of the power amplifier comprises a source-grounded dual gate MOS FET, a second gate of the dual gate MOS FET being connected to the gain control terminal.

Claim 15

A transmitter of claim 11, wherein the first detector for generating the transmission envelope signal and the second detector for generating the reference envelope signal are identical circuits, and matched in characteristics.

Claim 16

A transmitter of claim 11, wherein the multiplier comprises a D/A converter and a low pass filter, and the reference envelope signal is fed into a reference voltage terminal of the D/A converter, and is controlled by the burst control signal of digital signal.

Claim 17

A transmitter comprising: a power amplifier having a gain control terminal for amplifying an input modulation carrier signal for obtaining a transmission signal; a transmission monitor circuit for picking up a part of the transmission signal from the power amplifier as a monitor signal; a detector for detecting an envelope of the monitor signal to obtain a transmission envelope signal; a distortion-free envelope signal generator for generating a distortion-free envelope signal; a detection compensation circuit for receiving the distortion- free envelope signal and compensating for a nonlinearity of the detector to deliver an envelope control signal; and an error detector for comparing the envelope control signal and the transmission envelope signal to generate an error signal, and for supplying the error signal to the gain control terminal of the power amplifier, thereby controlling a gain of the power amplifier.

Claim 18

A transmitter of claim 17, wherein the power amplifier possesses a small phase distortion characteristic.

Claim 19

A transmitter of claim 17, wherein the power amplifier comprises a transistor of emitter grounding or source grounding, a collector or a drain of the transistor being connected to the gain control terminal.

Claim 20

A transmitter of claim 17, wherein a Younger stage of the power amplifier comprises a source-grounded dual gate MOS FET, a second gate of the dual gate MOS FET being connected to the gain control terminal.

Claim 21

A transmitter of claim 17, wherein the detection compensation circuit is identical with the detector for generating the transmission envelope signal, and is composed by using a nonlinear element matched in characteristic.

Claim 22

A transmitter comprising: a power amplifier having a gain control terminal for amplifying an input modulation carrier signal to obtain a transmission signal; a transmission monitor circuit for picking up a part of the transmission signal from the power amplifier as a monitor signal; a detector for detecting an envelope of the monitor signal to obtain a transmission envelope signal; a distortion-free envelope signal generator for generating a distortion-free envelope signal; a burst control signal generator for generating a burst control signal; a multiplier for multiplying the distortion-free envelope signal and the burst control signal; a detection compensation circuit for receiving an output of the multiplier and compensating for nonlinearity of the detector to deliver an envelope control signal; and an error detector for comparing the envelope control signal and the transmission envelope signal to generate an error signal, and for supplying the error signal to the gain control terminal of the power amplifier, thereby controlling a gain of the power amplifier.

Claim 23

A transmitter of claim 22, wherein the power amplifier possesses a small phase distortion characteristic.

Claim 24

A transmitter of claim 22, wherein the power amplifier comprises a transistor of emitter grounding or source grounding, a collector or a drain of the transistor being connected to the gain control terminal.

Claim 25

A transmitter of claim 22, wherein a Younger stage of the power amplifier comprises a source-grounded dual gate MOS FET, a second gate of the dual gate MOS FET being connected to the gain control terminal.

Claim 26

A transmitter of claim 22, wherein the detection compensation circuit is identical with the detector for generating the transmission envelope signal, and is composed by using a nonlinear element matched in characteristic.