Patent EP0474442A2 successfully refreshed from Google Patents.
EP0474442A2
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Internal bus for work station interfacing means
Assignee: NCR International Inc
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Filing: 1991-08-30
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Granted: —
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Expires: 2011-08-30
Abstract
Abstract A work station includes a plurality of integrated circuit interface chips (30,40,50) interfacing respectively with memory units (42), bus means (32) such as a Micro Channel bus, and peripheral units (52A-52E). The interface chips (30,40,50) are all connected to a local bus (20) to which a central processing unit (10) is connected. Each of the interfacing chips (30,40,50) is designed as a self-contained functional block operating at a similar clock frequency to the central processing unit (10) but with a timing independent from that of the central processing unit (10). Each interfacing chip (30) includes a plurality of operational units (34,36,38) communicating with each other through an internal bus (35) to which access is granted by an internal arbiter (66) according to a priority assigned to respective operational units (34,36,38).
Inventors
- 👤 Edward C. King
- 👤 Anton Goeppel
Bibliographic Details
Application Number
—
Jurisdiction
EP
Data Source
google_patents
Last Synchronized
2026-11-04 19:01
CPC Classifications
G; G06; G06F; G06F13/00; G06F13/14; G06F13/36; G06F13/362; G06F13/364
Claims Analysis
Total Claims: 10
Claim 1
Independent Claim
141 words
A work station, including a central processing unit (10), characterized in that a plurality of integrated circuit interface chips (30,40,50) are provided, connected to interface respectively to memory means (42), external bus means (32) arranged to transfer information at a frequency which may differ from the operating frequency of said central processing unit, and peripheral units (52A-52E); in that a local bus (20) in provided, coupled to said central processing unit (10) and to said plurality of interface chips (30,40,50); and in that said interface chips (30,40,50) include respective internal buses (35,45,55) adapted to interconnect operating units (34,36,38;44,46,48;54,56,58) disposed in the respective interface chips (30,40,50), said interface chips being adapted to operate at the same clock frequency as said central processing unit (10), but with operational signals generated on the respective internal bus (35,45,55) independently of said central processing unit (10).
Claim 2
Dependent Claim
44 words
A work station according to claim 1, characterized in that a plurality of interface chips (30) are provided, adapted to interface to respective external bus means (32) and/or a plurality of interface chips (40) are provided, adapted to interface to respective memory means (42).
Claim 3
Dependent Claim
33 words
A work station according to claim 1 or claim 2, characterized in that said internal buses (35,45,55) each include data signal lines, address signal lines, operational unit indentification lines and command signal lines.
Claim 4
Dependent Claim
33 words
A work station according to any one of the preceding claims, characterized in that said local bus (20) includes data signal lines, address signal lines, control signal lines and a clock signal line.
Claim 5
Dependent Claim
91 words
A work station according to claim 4, characterized in that each of said interface chips (e.g. 30) includes an internal arbiter (66), in that the operating units (34,36,38) of each interface chip (30) are assigned respective different priorities, and in that each operating unit (34,36,38) is adapted to transmit a bus request signal and a unit identification signal to said internal arbiter (66) which in response is adapted to transmit a bus grant signal granting access to the internal bus (35) to the requesting operating unit (34,36,38) having the highest priority.
Claim 6
Dependent Claim
87 words
A work station according to claim 5, characterized in that said internal bus (35) includes a burst mode control line for each of the associated operating units (34,36,38), whereby a first operating unit (34,36,38) obtaining access to said internal bus (35) for communication with a second operating unit (34,36,38) and activating its burst mode control line is effective to lock said internal bus (35) for such communication for a plurality of operating cycles on said internal bus (35), during which data is transferred in a burst mode.
Claim 7
Dependent Claim
44 words
A work station according to claim 6, characterized in that said internal bus (35) includes a busy mode control line for each of the associated operating units (34,36,38), activation of a busy mode control line indicating that the associated operating unit (34,36,38) is busy.
Claim 8
Dependent Claim
67 words
A work station according to claim 6 or claim 7, characterized in that said internal bus (35) includes a retry signal line for each of the associated operating units (34,36,38) which attempts to obtain access to another of said operating units (34,36,38) which is currently busy, an active retry signal being effective to enable said internal arbiter (66) to reorder the priority on said internal bus (35).
Claim 9
Dependent Claim
76 words
An integrated circuit interface chip for use in a work station having a central processing unit (10) and a local bus (20), characterized by an internal bus (35) adapted to interconnect operating units (34,36,38) disposed in said interface chip (30), said interface chip (30) being adapted to operate at the same clock frequency as said central processing unit (10), but with operational signals generated on said internal bus (35) independently of said central processing unit (10).
Claim 10
Dependent Claim
99 words
An integrated circuit interface chip according to claim 9, characterized in that said internal bus (35) includes data signal lines, address signal lines, operational unit indentification lines, command signal lines and an internal arbiter (66), in that said operating units (34,36,38) are assigned respective different priorities, and in that each operating unit (34,36,38) is adapted to transmit a bus request signal and a unit identification signal to said internal arbiter (66) which in response is adapted to transmit a bus grant signal granting access to the internal bus (35) to the requesting operating unit (34,36,38) having the highest priority.
References Cited (Backward Citations)
No citation records indexed.
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