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EP0473966A1 Expired / Lapsed EP ⏱️ 0.0 years remaining

CCD having a pair of horizontal resisters

Assignee: Sony Corp
•
Filing: 1991-08-09
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Granted: —
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Expires: 2011-08-09
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Abstract

Abstract 5 n7 In order to prevent a horizontal stripe and a flicker from taking place due to a gain difference between two circuit systems (channels), the solid state imager of the present invention includes a pilot signal generating means provided within a solid state image pickup element for allowing two output units to generate pilot signals of the same level and a gain correcting circuit provided outside of said solid state image pickup element for comparing levels of the pilot signals passed through the two circuit systems and correcting a gain of one circuit system if the two pilot signals have a level difference therebetween. Further, in a solid state imager of the present invention, a pilot signal for detecting gains of two circuit systems which process signals from two output units of a solid state image pickup element is inserted into a video signal without modifying the rule with respect to the signal timing so that signal charges are supplied from a pilot signal generating means to respective horizontal registers so as to output the pilot signal during the dummy bit output period.

Inventors

  • 👤 Atsushi Kobayashi
  • 👤 Makoto Onga
  • 👤 Masatoshi Sase
  • 👤 Yasushi Sato

Bibliographic Details

Application Number —
Jurisdiction EP
Data Source google_patents
Last Synchronized 2026-11-09 16:48
CPC Classifications
H; H04; H04N; H04N25/00; H04N25/70; H04N25/71; H04N25/75; H04N25/713; H04N25/60; H04N25/67; H04N25/671; H04N25/672; H04N25/673; H04N25/677; H04N25/73

Claims Analysis

Total Claims: 6
Claim 1
Independent Claim 113 words
A solid state imager in which a solid state image pickup element is provided with two output units to simultaneously generate signals from said two output units and an external circuit is formed of two circuit systems for processing the signals from said two output units, comprising: pilot signal generating means provided within said solid state image pickup element for generating signals of the same level to said two output units as pilot signals; and a gain correcting circuit for comparing the levels of said pilot signal passed through said two circuit systems and controlling gains of said two circuit systems so as to remove a level difference between said two circuit systems.
Claim 2
Dependent Claim 113 words
A solid state imager in which a solid state image pickup element is provided with two output units to simultaneously generate signals from said two output units and an external circuit is formed of two circuit systems for processing the signals from said two output units, comprising: pilot signal generating means provided within said solid state image pickup element for generating signals of the same level to said two output units as pilot signals; and a gain correcting circuit for comparing the levels of said pilot signal passed through said two circuit systems and controlling gains of said two circuit systems so as to remove a level difference between said two circuit systems.
Claim 3
Dependent Claim 95 words
A solid state imager according to claim 1, wherein said solid state image pickup element is comprised of: a plurality of light receiving elements arranged in a matrix fashion; vertical transfer registers for transferring charges of said light receiving elements in the vertical direction; first and second horizontal transfer registers for separately transferring the charge of one horizontal line supplied from said vertical registers; and a control gate provided between said first and second horizontal transfer registers, wherein said pilot signal generating means simultaneously inserts pilot signals into said first and second horizontal transfer registers.
Claim 4
Dependent Claim 26 words
A solid state imager according to claim 2, wherein the charges of said plurality of light receiving elements arranged in a matrix fashion are read independently.
Claim 5
Dependent Claim 83 words
A solid state imager according to claim 1, wherein each of said two circuit systems includes a correlation double sampling circuit and a gain control amplifier supplied with an output signal of said correlation double sampling circuit, whereby a pair of pilot signals involved in said two circuit systems are sampled and held and a gain of said gain control amplifier of one circuit system can be varied by an output which results from comparing the sampled and held outputs by a comparator.
Claim 6
Dependent Claim 92 words
A solid state imager according to claim 1, wherein said solid state image pickup element in which two horizontal registers having dummy bits provided at the transfer side are provided and two signals are simultaneously output from said horizontal registers through said output units includes pilot signal generating means for supplying signal charges of the same amount to said horizontal registers as pilot signals, wherein signal charges are supplied from said pilot signal generating means to said horizontal registers such that said pilot signals are output during a dummy bit output period.

References Cited (Backward Citations)

GB2156628A Cited
US4675887A Cited
US4750042A Cited

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