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EP0466508A1
Expired / Lapsed
EP
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MOS-type semiconductor device and manufacturing method thereof
Assignee: Panasonic Holdings Corp
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Filing: 1991-07-12
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Granted: —
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Expires: 2011-07-12
Abstract
Abstract A semiconductor device comprises source, channel and drain regions arranged generally vertically, and the channel and drain regions have special parts which are of the same conductivity type as the channel and drain regions respectively but highly doped, and these highly doped special parts adjoin each other. Such a device can control load current freely and smoothly while withstanding high drain voltages.
Inventors
- 👤 Akihiro 1-7 Tobushi-Cho Kayahara
- 👤 Isamu 479 Ohoaza Kawanami Kawashima
- 👤 Hiroshiy 18-24-105 Uradouhonnmachi Tanida
- 👤 Yuyi 11-504 Shimeien Yamanishi
Bibliographic Details
Application Number
—
Jurisdiction
EP
Data Source
google_patents
Last Synchronized
2026-11-04 11:59
CPC Classifications
H; H10; H10D; H10D30/00; H10D30/01; H10D30/021; H10D30/028; H10D30/0291; H10D30/60; H10D30/64; H10D30/66; H10D30/665; H10D84/00; H10D84/01; H10D84/0107; H10D84/0109; H10D84/02; H10D84/03; H10D84/038; H10D84/101; H10D84/141; H10D84/148; H10D89/00; H10D89/60; H10D89/601; H10D89/611; H10D62/00; H10D62/10; H10D62/102; H10D62/112
Claims Analysis
Total Claims: 7
Claim 1
Independent Claim
168 words
1 A semiconductor device comprising: a semiconductor substrate (1) including a first region (5) second region (6) and third region (7); the first region (5) being of one conductivity type and occupying a small part of the substrate adjacent to the upper surface thereof, the second region (6) being of opposite conductivity type, surrounding the first region (5) having a pn-junction therewith which extends to the upper surface, and including channel region (8) which is formed by the part adjacent to the upper surface, the third region (7) being of the first conductivity type, consisting of the remaining part of the substrate, having a pn-junction with the second region (6) which extends to the upper surface and including a high impurity concentration part (9) which lies adjacent to the second region and the upper surface, and having a gate electrode (13) on the channel region with gate oxide (14) therebetween, a source and a drain electrode respectively connected with the first region (5) and the third region (6).
Claim 2
Dependent Claim
168 words
1 A semiconductor device comprising: a semiconductor substrate (1) including a first region (5) second region (6) and third region (7); the first region (5) being of one conductivity type and occupying a small part of the substrate adjacent to the upper surface thereof, the second region (6) being of opposite conductivity type, surrounding the first region (5) having a pn-junction therewith which extends to the upper surface, and including channel region (8) which is formed by the part adjacent to the upper surface, the third region (7) being of the first conductivity type, consisting of the remaining part of the substrate, having a pn-junction with the second region (6) which extends to the upper surface and including a high impurity concentration part (9) which lies adjacent to the second region and the upper surface, and having a gate electrode (13) on the channel region with gate oxide (14) therebetween, a source and a drain electrode respectively connected with the first region (5) and the third region (6).
Claim 3
Dependent Claim
23 words
A semiconductor device according to claim 1, wherein the second region further includes a high concentration part which lies under the first region.
Claim 4
Dependent Claim
24 words
A semiconductor device according to claim 1 or 2, wherein the substrate is provided with a Zener diode connected between the gate and source.
Claim 5
Dependent Claim
24 words
A semiconductor device according to claim 3, wherein the Zener diode is on top of the surface of the substrate with oxide layer therebetween.
Claim 6
Dependent Claim
322 words
Method of manufacturing semiconductor device comprising the steps of; (a) forming a first oxide layer on a semiconductor substrate of one conductivity type. (b) forming silicon nitride layer on the first oxide layer, removing, by way of photolithography and etching of photoresist, a part of silicon nitride layer, the part being to be covered by a field oxide, (c) ion-implanting impurity of the one conductivity type into the said part of substrate to be covered by field oxide to form the region with impurity concentration higher than that of the substrate, (d) removing the photoresist layer on the nitride film, (e) growing second oxide layer on the part of the surface having higher impurity concentration. (f) removing the nitride layer and the oxide layer to expose the surface of the substrate other than the part of the surface having high impurity concentration. (g) growing third oxide layer all over the substrate, (h) growing polysilicon layer all over the third oxide layer, (i) removing a part of polysilicon layer by lithography and etching of photoresist, leaving the parts to become gate electrode on the gate oxide and the parts on the field oxide to become a Zener diode, (j) patterning of photoresist so as to make a window smaller than the space between the gates and ion-implanting impurity through the window into the parts of semiconductor substrate adjacent to the surface between the gates, to form a high concentration part in the second region, (k) removing the photoresist and ion-implanting through the gate oxide as mask into the parts of silicon substrate adjacent to the surface between the gate, to form the channel part of the second region, (l) patterning and ion-implanting impurity of the one conductivity type into the second region to form the first region, and at the same time, into the part of the polysilicon layer on the field oxide, to change a part thereof to the one conductivity type.
Claim 7
Dependent Claim
322 words
Method of manufacturing semiconductor device comprising the steps of; (a) forming a first oxide layer on a semiconductor substrate of one conductivity type. (b) forming silicon nitride layer on the first oxide layer, removing, by way of photolithography and etching of photoresist, a part of silicon nitride layer, the part being to be covered by a field oxide, (c) ion-implanting impurity of the one conductivity type into the said part of substrate to be covered by field oxide to form the region with impurity concentration higher than that of the substrate, (d) removing the photoresist layer on the nitride film, (e) growing second oxide layer on the part of the surface having higher impurity concentration. (f) removing the nitride layer and the oxide layer to expose the surface of the substrate other than the part of the surface having high impurity concentration. (g) growing third oxide layer all over the substrate, (h) growing polysilicon layer all over the third oxide layer, (i) removing a part of polysilicon layer by lithography and etching of photoresist, leaving the parts to become gate electrode on the gate oxide and the parts on the field oxide to become a Zener diode, (j) patterning of photoresist so as to make a window smaller than the space between the gates and ion-implanting impurity through the window into the parts of semiconductor substrate adjacent to the surface between the gates, to form a high concentration part in the second region, (k) removing the photoresist and ion-implanting through the gate oxide as mask into the parts of silicon substrate adjacent to the surface between the gate, to form the channel part of the second region, (l) patterning and ion-implanting impurity of the one conductivity type into the second region to form the first region, and at the same time, into the part of the polysilicon layer on the field oxide, to change a part thereof to the one conductivity type.
References Cited (Backward Citations)
GB2103877A
Cited
EP0179407A2
Cited
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