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EP0460928A2 Expired / Lapsed EP ⏱️ 0.0 years remaining

Video signal converting apparatus

Assignee: Panasonic Holdings Corp
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Filing: 1991-06-05
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Granted: —
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Expires: 2011-06-05
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Abstract

Abstract A video signal converting apparatus comprising an interpolating circuit for interpolating a non-sampling point from sampling points in a field for restoring a high definition television signal band-compressed by offset sub-sampling, a first delay element for delaying the interpolated signal by one field period, a second delay element for delaying an output of the first delay element by one field period, a median-value selector for selecting a median-value signal from signals in adjacent three fields from the input and output of the two delay elements, and an adder for averaging the output of the first delay element and an output of the median-value selector. <IMAGE>

Inventors

  • 👤 Atsushi Ishizu
  • 👤 Yoshio Seki
  • 👤 Masaki Tokoi

Bibliographic Details

Application Number —
Jurisdiction EP
Data Source google_patents
Last Synchronized 2026-11-09 05:47
CPC Classifications
H; H04; H04N; H04N7/00; H04N7/015; H04N7/0152; H04N7/01; H04N7/0125

Claims Analysis

Total Claims: 9
Claim 1
Independent Claim 104 words
A video signal converting apparatus comprising an interpolating circuit for interpolating a non-sampling point from sampling points in a field for restoring a high definition television signal band-compressed by offset sub-sampling, a first delay element for delaying the interpolated signal by one field period, a second delay element for delaying an output of the first delay element by one field period, a median-value selector for selecting a median-value signal from signals in adjacent three fields from the input and output of the two delay elements, and an adder for averaging the output of the first delay element and an output of the median-value selector.
Claim 2
Dependent Claim 44 words
A video signal converting apparatus of claim 1, wherein a time-axis conversion circuit for converting the number of scanning lines from the high definition television signal into a standard television signal of progressive scanning is disposed in an input stage of the interpolating circuit.
Claim 3
Dependent Claim 45 words
A video signal converting apparatus of claim 1, wherein a scanning line converting circuit for converting scanning lines of the standard television signal of progressive scanning into those of the standard television signal of interlace scanning is disposed in an output stage of the adder.
Claim 4
Dependent Claim 47 words
A video signal converting apparatus of claim 1, wherein the median-value selector compares levels of every two signals out of three input field signals, detects the median-value signal by level, and delivers the median-value signal by changing over the selector circuit depending on a result of detection.
Claim 5
Dependent Claim 142 words
A video signal converting apparatus comprising a time-axis conversion circuit for converting a high definition television signal band-compressed by offset sub-sampling to a standard television signal of progressive scanning by changing the number of scanning lines, a first delay element for delaying the converted standard television signal by one field period, a second delay element for delaying an output of the first delay element by one field period, first, second and third interpolating circuits for interpolating non-sampling points from sampling points in a field for restoring sub-sampled signals in adjacent three fields from the input and output of the two delay elements, a median-value selector for selecting a median-value signal of signals of adjacent three fields from outputs of the three interpolating circuits, and an adder for averaging an output of the second interpolation circuit and an output of the median-value selector.
Claim 6
Dependent Claim 43 words
A video signal converting apparatus of claim 5, wherein a converting circuit for converting scanning lines of the standard television signal of progressive scanning to those of a standard television signal of interlace scanning is disposed in an output stage of the adder.
Claim 7
Dependent Claim 128 words
A video signal converting apparatus comprising an interpolating circuit for interpolating a non-sampling point from sampling points in a field for restoring a high definition signal band-compressed by offset sub-sampling, a first delay element for delaying the interpolated signal by one field period, a second delay element for delaying an output of the first delay element by one field period, a median-value selector for selecting a median-value signal of adjacent three fields from the input and output of the two delay elements, an adder for averaging the output of the first delay element and an output of the median-value selector, and a time-axis conversion circuit for converting the number of scanning lines and aspect ratio simultaneously from an output signal of the adder to the standard television signal.
Claim 8
Dependent Claim 146 words
A video signal converting apparatus comprising a first delay element for delaying a high definition television signal band-compressed by offset sub-sampling by one field period, a second delay element for delaying an output of the first delay element by further one field period, first second, and third interpolating circuits for interpolating non-sampling points from sampling points in a field for restoring sub-sampled signals of adjacent three fields from the input and output of the two delay elements, a median-value selector for selecting a median-value signal of the signals of the adjacent three fields from outputs of the three interpolating circuits, an adder for averaging an output of the second interpolating circuit and an output of the median-value selector, and a time-axis conversion circuit for converting the number of scanning lines and aspect ratio simultaneously from an output signal of the adder to the standard television signal.
Claim 9
Dependent Claim 60 words
A video signal converting apparatus of claim 7 or 8, wherein the time-axis conversion circuit comprises a field memory circuit for writing and reading asynchronously, a write control circuit for sampling desired video data from the high definition television signal, and a read control circuit for reading out the written video data at a rate of the standard television signal.

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