Abstract A micro controller which has a first memory (5) in which invertedly enciphered program data is stored, a second memory (7) which stores cipher key data necessary for decoding the password stored in the first memory, a CPU (1) which controls writing data to or reading data from the first and second memories and a unit (9) which descrambles the cipher in the program data stored in the first memory based on the key data stored in the second memory, when the CPU accesses the first memory. The operation of this CPU is based on the program data which is decoded using the descrambling unit, which makes it possible to effectively block decoding or altering of programs and data.
A micro controller comprising: a first memory (5) in which invertedly enciphered program data is stored, a second memory (7) which stores cipher key data necessary for decoding the password stored in the first memory, a CPU (l) which controls writing data to or reading data from said first and second memories, and means (9), based on the key data stored in the second memory, for descrambling the cipher in the program data stored in said first memory when said CPU accesses said first memory, said CPU operating based on the program data which is decoded using said means for descrambling.
Claim 2
Dependent Claim
19 words
A micro controller according to claim l, wherein said second memory stores key data for several types of ciphers.
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