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EP0447145A2 Expired / Lapsed EP ⏱️ 0.0 years remaining

User scheduled direct memory access using virtual addresses

Assignee: HP Inc
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Filing: 1991-03-11
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Granted: —
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Expires: 2011-03-11
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Abstract

Abstract The present invention relates to an intelligent direct memory access (DMA) controller (22) which interprets user commands from a host system (20), translates virtual addresses from the user applications program to physical addresses, and retrieves blocks of data from the main system memory (32) at the request of the user's code, rather than at the request of the kernel code (201) of the host system (20). This is accomplished by representing the data processing commands of the user and the data associated therewith as respective command/pointer packets comprised of data processing commands and virtual pointers to the associated data in virtual memory space of the user's host system (20). The virtual pointers of the command/pointer packets may then be translated to physical pointers for purposes of identifying physical addresses within the main memory (32) at which the associated data is located. The associated data may then be read from the physical address in the main memory (32) without interrupting the host processor (20). Techniques are also disclosed whereby the attributes of virtual memory systems such as page fault and access fault correction may be maintained in conjunction with the user scheduled DMA technique of the invention.

Inventors

  • 👤 Russ W. Herrell
  • 👤 Thomas P. Morrissey

Bibliographic Details

Application Number —
Jurisdiction EP
Data Source google_patents
Last Synchronized 2026-11-01 15:16
CPC Classifications
G; G06; G06F; G06F12/00; G06F12/02; G06F12/08; G06F12/0802; G06F12/0806; G06F12/0815; G06F12/0831; G06F12/0835; G06F13/00; G06F13/14; G06F13/20; G06F13/28; Y; Y10; Y10S; Y10S707/00; Y10S707/99941; Y10S707/99944; Y10S707/99945; Y10S707/99948

Claims Analysis

Total Claims: 9
Claim 1
Independent Claim 114 words
An interface device for transferring data processing commands and associated data between a user's host system (20) having a main memory (32) and an external data processing system (24), comprising: means (35) for representing said data processing commands and associated data as respective command/pointer packets comprising said data processing commands and virtual pointers to said associated data in virtual memory space of the user's host system (20); means (222) for translating said virtual pointers to physical pointers which identify physical addresses within said main memory (32) at which said associated data is located; and means (223) for reading and writing said associated data from and to said main memory (32) at said physical addresses.
Claim 2
Dependent Claim 109 words
An interface device for transferring graphics commands and graphics primitives between a user's host system (20) having a main memory (32) and a graphics subsystem (24), comprising: means (35) for representing said graphics commands and graphics primitives as respective command/pointer packets comprising said graphics commands and virtual pointers to said graphics primitives in virtual memory space of the user's host system (20); means (222) for translating said virtual pointers to physical pointers which identify physical addresses within said main memory (32) at which said graphics primitives are located; and means (223) for reading and writing said graphics primitives from and to said main memory (32) at said physical addresses.
Claim 3
Dependent Claim 71 words
A device as in claim 2, wherein said representing means comprises a user applications program (202, 203) operating on said user's host system (20) and said translating means comprises a DMA processor (222) having access to at least one shadow page table updated by a processor driven operating system (201) of the user's host system (20), said at least one shadow page table containing physical pointers corresponding to said virtual pointers.
Claim 4
Dependent Claim 28 words
A device as in claim 3, wherein said DMA processor (222) has a user privileged shadow page table for each user controlled process of said host system (20).
Claim 5
Dependent Claim 28 words
A device as in claim 4, wherein said DMA processor (222) includes a translation lookaside buffer for storing the addresses of recent accesses to said shadow page table.
Claim 6
Dependent Claim 80 words
A device as in claim 5, further comprising additional data storage means (38) for storing data, said DMA processor (222) interrupting said processor driven operating system (201) so that said processor driven operating system (201) can operate a fault algorithm for locating and swapping said graphics primitives between said additional data storage means (38) and said main memory (32) when said reading and writing means (223) receives an indication that said graphics primitives are not in said main memory (32).
Claim 7
Dependent Claim 38 words
A device as in claim 6, wherein entries in said shadow page table are updated by said processor driven operating system (201) in response to said indication that said graphics primitives are not in said main memory (32).
Claim 8
Dependent Claim 31 words
A device as in claim 7, wherein entries in said shadow page table are created by said processor driven operating system (201) in response to commands from said DMA processor (222).
Claim 9
Independent Claim 114 words
A method for providing direct memory access by an external data processing system (24) to data stored in a main memory (32) of the user's host system (20) in response to a user's data processing command, comprising the steps of: representing said user's data processing command and associated data as a command/pointer packet including a virtual pointer to said associated data in virtual memory space of said user in said user's host system (20); translating said virtual pointer to a physical pointer which identifies a physical address within said main memory (32) at which said associated data is located; and accessing said main memory (32) at the physical address identified by said physical pointer.

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