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EP0444875A2
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Method and apparatus for increasing throughput in random repetitive digitizing systems
Assignee: HP Inc
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Filing: 1991-02-26
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Granted: —
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Expires: 2011-02-26
Abstract
Abstract Circuits (260) for increasing throughput in random repetitive signal acquisition systems that use triggers (100). The circuits (260) allow the random repetitive signal acquisition systems to terminate an acquisition only when there is a high probability that usable samples have reached the systems. The circuits comprise logic elements (320) for producing a qualifier signal (350) having at least two input ports (330,340). A first delay element (300) is coupled to a first input (330) of the logic element (320) for introducing a first delay (270) in a sample signal (290), thereby producing a first delayed sample signal for setting the logic element (320) and enabling the qualifier signal (350). A second delay element (310) is coupled to a second input port (340) of the logic element (320) for introducing a second delay (280) in the sample signal (290), thereby producing a second delayed sample signal for resetting the logic element (320) and disabling the qualifier signal (350). The qualifying signal (350) qualifies a trigger signal produced by trigger circuitry (100) in the random repetitive signal acquisition system. The qualifier signal (350) is generally periodic and is particularly useful in qualifying a trigger signal in a digitizing oscilloscope.
Inventors
- 👤 B. Allen Montijo
Bibliographic Details
Application Number
—
Jurisdiction
EP
Data Source
google_patents
Last Synchronized
2026-10-24 02:44
CPC Classifications
G; G01; G01R; G01R13/00; G01R13/20; G01R13/22; G01R13/34; G01R13/345
Claims Analysis
Total Claims: 12
Claim 1
Independent Claim
158 words
A circuit (260) for increasing throughput in a random repetitive signal acquisition system of the type which uses triggers (100), wherein the circuit allows the random repetitive signal acquisition system to terminate an acquisition only when there is a high probability that usable samples have reached the system, characterized by: logic means (320) for producing a qualifier signal (350) having at least two input ports (330, 340); first means (300) coupled to a first input port (330) of the logic means (320) for introducing a first delay (270) in a sample signal (290), thereby producing a first delayed sample signal for setting the logic means (320) and enabling the qualifier signal (350); and second means (310) coupled to a second input port (340) of the logic means (320) for introducing a second delay (280) in a sample signal (290), thereby producing a second delayed sample signal for resetting the logic means (320) and disabling the qualifier signal (350).
Claim 2
Dependent Claim
15 words
The circuit recited in Claim 1 wherein the logic means characterized by a flip-flop (320).
Claim 3
Dependent Claim
39 words
The circuit recited in Claim 2 wherein the first means (300) characterized by an integrated circuit (660) adapted to produce the first delay (270), the first delay (270) having a magnitude being one of at least two possible values.
Claim 4
Dependent Claim
39 words
The circuit recited in Claim 3 wherein the second means (310) characterized by an integrated circuit (670) adapted to produce the second delay (280), the second delay (280) having a magnitude being one of at least two possible values.
Claim 5
Dependent Claim
23 words
The circuit recited in Claim 1 wherein the first delay means (300) is characterized by a phase-locked loop (583, 584, 589A, 589C, 589G).
Claim 6
Dependent Claim
117 words
An oscilloscope characterized by: digitizing means (170, 180) having a plurality of channels for digitizing an input signal (30, 50) according to a sample signal having a sample rate; acquisition memory means (190, 200) coupled to the digitizing means for storing the digitized signals; screen means (230) interfaced with the acquisition memory means for displaying the digitized signals stored in the acquisition memory means, the screen means having a predetermined time width; trigger means (90) operatively coupled to the screen means for producing a trigger signal to activate the screen means and display the digitized signals; and qualifier means (100) operatively coupled to the trigger means for producing a qualifier signal to periodically enable the trigger means.
Claim 7
Dependent Claim
114 words
The oscilloscope recited in Claim 6 wherein the qualifier means is further characterized by; logic means (320) having at least two input ports (330, 340) for outputting the qualifier signal to the trigger means (90); first means (300) coupled to a first input port (330) of the logic means (320) for introducing a first delay (270) in the sample signal (290), thereby producing a first delayed sample signal for setting the logic means (320); and second means (310) coupled to a second input port (340) of the logic means (320) for introducing a second delay (280) in the sample signal (290), thereby producing a second delayed sampled signal for resetting the logic means (320).
Claim 8
Dependent Claim
17 words
The oscilloscope recited in Claim 7 wherein the logic means is further characterized by a flip-flop (320).
Claim 9
Dependent Claim
34 words
The oscilloscope recited in Claim 8 wherein the first means is (300) characterized an integrated circuit (660) adapted to produce the first delay (270), the first delay (270) having at least two possible values.
Claim 10
Dependent Claim
35 words
The oscilloscope recited in Claim 9 wherein the second means (310) is characterized by an integrated circuit (670) adapted to produce the second delay (280), the second delay (280) having at least two possible values.
Claim 11
Dependent Claim
21 words
The oscilloscope recited in Claim 7 wherein the first means (300) is characterized by phase-locked loop (583, 584, 589A, 589C, 589G).
Claim 12
Dependent Claim
193 words
The oscilloscope recited in Claim 6 wherein the qualifier means characterized by: conversion means (380) for converting the sample signal (290, 360) to a continuously varying signal (400); first comparison means (420) operatively coupled to the conversion means (380) for comparing the continuously varying signal (400) to a first threshold signal (460) and outputting a first signal (490) when the continuously varying signal (400) is greater than first threshold (460); second comparison means (440) operatively coupled to the conversion means (380) for comparing the continuously varying signal (400) to a second threshold signal (480) and outputting a second signal (500) when the continuously varying signal (400) is greater than the second threshold (480); first inversion means (285) operatively coupled to the first comparison means (420) for selectively inverting the first signal (490); second inversion means (295) operatively coupled to the second comparison means (440) for selectively inverting the second signal (500); and flip-flop means (350) operatively coupled to the first inversion means and second inversion means (285, 295), the flip-flop means (350) setting when it receives the inverted first signal and resetting when it receives the second signal, thereby producing the qualifier signal.
References Cited (Backward Citations)
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