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EP0444779A1 Expired / Lapsed EP ⏱️ 0.0 years remaining

Split level bus

Assignee: Motorola Solutions Inc
•
Filing: 1991-01-28
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Granted: —
•
Expires: 2011-01-28
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Abstract

Abstract A split level differential bus having first and second signals (D, D ¯ ) at first and second lines, respectively, for transmitting data from a typical driver (10) to a typical receiver (18), includes a first independent voltage source for terminating the first line and a second independent voltage source for terminating the second line, the second independent voltage source providing a voltage level that is different from the voltage level provided by the first independent voltage source. A current switch circuit (12) controlled by the driver for switching current from the first line to the second line. A level shifting circuit (16) coupled between the first line and the receiver for level shifting the first signal by a predetermined voltage.

Inventors

  • 👤 Ray D. Sundstrom
  • 👤 Dwight D. Esgar
  • 👤 Cleon Petty

Bibliographic Details

Application Number —
Jurisdiction EP
Data Source google_patents
Last Synchronized 2026-11-08 20:37
CPC Classifications
H; H04; H04L; H04L25/00; H04L25/02; H04L25/0264; H04L25/0272; G; G06; G06F; G06F13/00; G06F13/38; G06F13/40; G06F13/4063; G06F13/4068; G06F13/4072; H04L12/00; H04L12/28; H04L12/40; H04L25/0298

Claims Analysis

Total Claims: 3
Claim 1
Independent Claim 161 words
A split level bus system for transmitting true differential signals (D, D ¯ ) at first and second lines, respectively, comprising: a first independent voltage source (V CC ) for terminating the first line; a second independent voltage source (V TT ) for terminating the second line, said first independent voltage source providing a voltage level different than the voltage level provided by said second independent voltage source; driver means (10) for providing a logic low or a logic high output; current switch means (12) for switching current from the first line to the second line in response to said logic high output of said driver means; receiver means for accepting differential signals having a first input coupled to the first line and second input coupled to the second line; and level shifting means (16) coupled between the first line and said first input of said receiver means for level shifting the signal at the first line by a predetermined voltage.
Claim 2
Dependent Claim 44 words
The split level system bus according to claim 1 wherein said current switch means include: a transistor (14) having a collector coupled to the first line, a base coupled to said output of said driver means, and an emitter coupled to the second line.
Claim 3
Dependent Claim 76 words
The split level bus system according to claim 1 or 2 wherein said level shifting means includes: a transistor (28) having a collector coupled to a source potential, a base coupled to the first line, and an emitter coupled to said first input of said receiver means by a first resistor (30) and to a third independent voltage source (V EE ) by the series combination of said first resistor and an independent current source (32).

References Cited (Backward Citations)

WO1980001008A1 Cited

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