Patent EP0441201A2 successfully refreshed from Google Patents.
EP0441201A2
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EP
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A substrate bias voltage detection circuit
Assignee: Texas Instruments Inc
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Filing: 1991-01-25
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Granted: —
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Expires: 2011-01-25
Abstract
Abstract A substrate bias detection circuit is disclosed. The circuit includes first and second transistors, where the first transistor (2) has its source coupled to the substrate and where the second (4) transistor has its source coupled to a common potential (i.e., ground). The gate and drain of the first transistor (2) are connected together, and to the gate of the second transistor (4) load devices (6, 8) are connected between the drains of the first and second transistors and a bias potential from a power supply node. The threshold voltages of the first and second transistors may be different, with the difference determining the voltage that the substrate must reach, relative to the common potential, to cause the circuit to respond. Upon the substrate reaching a voltage sufficient to turn the second transistor (4) on, the drain of the second transistor (4) will be pulled toward the common potential, indicating loss of substrate bias. The circuit may be included into an integrated circuit in such a manner that power supply voltages may be disconnected from other circuitry in the event of loss of substrate bias, precluding the possibility of latchup in such other circuitry.
Inventors
- 👤 Ching-Yuh Tsay
- 👤 Narasimhan Iyengar
Bibliographic Details
Application Number
—
Jurisdiction
EP
Data Source
google_patents
Last Synchronized
2026-10-28 22:42
CPC Classifications
G; G11; G11C; G11C5/00; G11C5/14; G11C5/143; G05; G05F; G05F3/00; G05F3/02; G05F3/08; G05F3/10; G05F3/16; G05F3/20; G05F3/205; G11C11/00; G11C11/21; G11C11/34; G11C11/40; G11C11/401; G11C11/4063; G11C11/407; G11C11/4074; G11C5/145; G11C5/146
Claims Analysis
Total Claims: 21
Claim 1
Independent Claim
59 words
An integrated circuit, comprising: a functional circuit having a bias node and a substrate node; a biasing circuit for biasing the bias node from a power supply terminal; and a substrate bias detection circuit connected to said biasing circuit, for disabling the bias at said bias node responsive to the bias at said substrate node exceeding a predetermined voltage.
Claim 2
Dependent Claim
18 words
The integrated circuit of claim 1, further comprising: a substrate bias generating circuit, for biasing said substrate node.
Claim 3
Dependent Claim
16 words
The integrated circuit of claim 2, wherein said substrate bias generating circuit comprises a charge pump.
Claim 4
Dependent Claim
14 words
The integrated circuit of claim 1, wherein said biasing circuit comprises a voltage driver.
Claim 5
Dependent Claim
93 words
The integrated circuit of claim 4, wherein said voltage driver has a first input for receiving an input voltage, has a second input coupled to said substrate bias detection circuit, and has an output connected to said bias node; wherein said substrate bias detection circuit presents a first logic level to said second input of said voltage driver responsive to the bias at said substrate node exceeding said predetermined voltage; and wherein said voltage driver presents a common potential at its output responsive to receiving said first logic state at its second input.
Claim 6
Dependent Claim
99 words
The integrated circuit of claim 1, wherein said substrate bias detection circuit comprises: a first transistor having its source coupled to said substrate node, and having its drain and gate coupled to a drive node; a first load connected between said driver node and a bias potential; a second transistor having its source coupled to a common potential, having its gate coupled to said drive node, and having a drain; and a second load connected between the drain of said second transistor and said bias potential; wherein said drain of said second transistor is coupled to said biasing circuit.
Claim 7
Dependent Claim
16 words
The integrated circuit of claim 6, wherein said first and second transistors have different threshold voltages.
Claim 8
Dependent Claim
24 words
The integrated circuit of claim 7, wherein the threshold voltage of said first transistor is higher than the threshold voltage of said second transistor.
Claim 9
Dependent Claim
22 words
The integrated circuit of claim 6, wherein said drain of said second transistor is coupled to said biasing circuit by an inverter.
Claim 10
Dependent Claim
79 words
A substrate bias detection circuit, comprising: a first transistor having its source coupled to a substrate potential, and having its drain and gate coupled to a drive node; a first load connected between said drive node and a bias potential; a second transistor having its source coupled to a common potential, having its gate coupled to said drive node, and having a drain; and a second load connected between the drain of said second transistor and said bias potential.
Claim 11
Dependent Claim
16 words
The detection circuit of claim 10, wherein said first and second transistors have different threshold voltages.
Claim 12
Dependent Claim
24 words
The detection circuit of claim 11, wherein the threshold voltage of said first transistor is higher than the threshold voltage of said second transistor.
Claim 13
Dependent Claim
19 words
The detection circuit of claim 10, further comprising: a buffer circuit connected to the drain of said second transistor.
Claim 14
Dependent Claim
13 words
The detection circuit of claim 13, wherein said buffer circuit comprises an inverter.
Claim 15
Dependent Claim
14 words
The detection circuit of claim 10, wherein said first load device comprises a transistor.
Claim 16
Dependent Claim
14 words
The detection circuit of claim 10, wherein said second load device comprises a transistor.
Claim 17
Dependent Claim
70 words
The detection circuit of claim 10, wherein said first and second transistors are of a first conductivity type; and wherein said first load device comprises a transistor of a second conductivity type having its source/drain path connected between said drive node and said bias potential, and having its gate coupled to a potential in such a manner that the source/drain path is conductive responsive to said first transistor being conductive.
Claim 18
Dependent Claim
60 words
The detection circuit of claim 10, wherein said first and second transistors are of a first conductivity type; and wherein said second load device comprises a transistor of a second conductivity type having its source/drain path connected between said drain of said second transistor and said bias potential, and having its gate coupled to the gate of said second transistor.
Claim 19
Dependent Claim
76 words
A substrate bias detection circuit comprising: a first n-channel MOS transistor, having its source connected to a substrate potential, and having its gate and drain connected together; a second n-channel MOS transistor, having its source connected to a common potential, and having its gate connected to the drain of said first n-channel MOS transistor; first and second load devices, connected between a bias potential and the drain of said first and second n-channel MOS transistors, respectively.
Claim 20
Dependent Claim
28 words
The detection circuit of claim 19, wherein the threshold voltage of said first n-channel MOS transistor is different from the threshold voltage of said second n-channel MOS transistor.
Claim 21
Dependent Claim
28 words
The detection circuit of claim 20, wherein the threshold voltage of said first n-channel MOS transistor is higher than the threshold voltage of said second n-channel MOS transistor.
References Cited (Backward Citations)
No citation records indexed.
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