Patent US6275232B1 successfully refreshed from Google Patents.
Patent EP0435093A2 successfully refreshed from Google Patents.
← Back to Patent Explorer
EP0435093A2 Expired / Lapsed EP ⏱️ 0.0 years remaining

Thin, molded, surface mount electronic device

Assignee: Motorola Solutions Inc
•
Filing: 1990-12-13
•
Granted: —
•
Expires: 2010-12-13
📄 Original PDF 🌐 Google Patents 🔄 Sync Now

Abstract

Abstract An electronic component (10) having a flexible substrate (32) with conductive traces (34) thereon may have the leads separated into arrays (24) that are shaped to contact and be surface mounted to the bonding lands (16) on a printed circuit board (PCB) (12). The flexible substrate (32) , such as polyimide, adheres to the traces (34) and is formed into lead arrays (24) with them. The lead arrays (24) thus keep portions of the leads and the outer bonding areas (50) corresponding thereto aligned with respect to each other during handling and mounting to the PCB (12). An alignment mechanism (24/28) may be optionally present on the lead arrays (24) that mates with a corresponding mechanism (30) on the PCB (12). The package body (18) itself may be overmolded, assembled from prior parts, etc. Another alternate version includes test points (46) on the perimeter of the substrate(32) beyond the outer bonding areas (50) that may be used to test the device, such as an integrated circuit chip or die, at an intermediate stage in the assembly process. The periphery (44) and test points (46) may be sheared away before the device (10) is mounted to the PCB (12). A variety of outer bonding area pitches may be provided on the same device (10) with test points (46) of a standard pitch. The relatively inexpensive device (10) is thin and easily mounted by conventional techniques.

Inventors

  • 👤 Paul T. Lin
  • 👤 Michael B. Mcshane

Bibliographic Details

Application Number —
Jurisdiction EP
Data Source google_patents
Last Synchronized 2026-11-07 22:09
CPC Classifications
H; H10; H10P; H10P74/00; H05; H05K; H05K3/00; H05K3/30; H05K3/303; H10W; H10W70/00; H10W70/60; H10W70/67; H10W70/688; H10W74/00; H10W74/10; H10W74/111; H10W74/114; H05K2201/00; H05K2201/10; H05K2201/10227; H05K2201/10295; H05K2201/10303; H05K2201/10613; H05K2201/10621; H05K2201/10681; H05K2203/00; H05K2203/16; H05K2203/167; H10W72/00; H10W72/851; H10W72/874; H10W72/884; H10W72/90; H10W72/931; H10W72/932; H10W90/00; H10W90/701; H10W90/731; H10W90/734; H10W90/751; H10W90/754; Y; Y02; Y02P; Y02P70/00; Y02P70/50

Claims Analysis

Total Claims: 6
Claim 1
Independent Claim 191 words
An electronic device (10) for surface mounting on a printed circuit board (PCB) (12) having bonding lands (16) comprising: an insulative, flexible substrate (32) having a periphery (44), where the substrate (32) has an electronic component receiving area (36) thereon; a plurality of electrically conductive traces (34) on the substrate (32) extending from the electronic component receiving area (36) to the periphery (44), where the traces (34) have inner bonding areas (42) near the electronic component receiving area (36); and outer bonding areas (50) near the periphery (44); where at least two groups of traces (34) are formed into lead arrays (24) to permit the outer bonding areas (50) to contact and be bonded to the bonding lands (16) on a PCB (12) when the device (10) is mounted thereon; an electronic component (38) having a plurality of bonding pads (40) thereon, where the electronic component (38) is affixed to the electronic component receiving area (36) on the substrate (32) and the bonding pads (40) are electrically connected to the inner bonding areas (42); a package body (20) surrounding at least the electronic component (38) and the inner bonding areas (42).
Claim 2
Dependent Claim 15 words
The electronic device of claim 1 where the insulative, flexible substrate is transparent or translucent.
Claim 3
Dependent Claim 70 words
The electronic device (10) of claim 1 or 2 further comprising: test points (46) for each trace (34), where the test point (46) is at the substrate periphery (44) further removed from the electronic component receiving area (36) than the outer bonding areas (50) and where the test points (46) and the substrate periphery (44) are severable from the portion of the substrate (32) containing the outer bonding areas (50).
Claim 4
Dependent Claim 42 words
The electronic device (10) of any one of the preceding claims wherein the least two groups of traces (34) are separated by slots and are formed into lead arrays (24) with the substrate (32) remaining as part of the lead arrays (24).
Claim 5
Independent Claim 187 words
A method for making an electronic device (10) suitable for surface mounting on a printed circuit board (PCB) (12) having bonding lands (16) comprising: providing an insulative, flexible substrate (32) having a periphery (44), where the substrate (32) has an electronic component receiving area (36) thereon; and where the substrate (32) additionally has a plurality of electrically conductive traces (34) thereon extending from the electronic component receiving area (36) to the periphery (44), where the traces (34) have inner bonding areas (42) near the electronic component receiving area (36); and outer bonding areas (50) near the periphery (44); affixing an electronic component (38) having a plurality of bonding pads (40) thereon to the electronic component receiving area (36) on the substrate (32); electrically connecting the bonding pads (40) are to the inner bonding areas (42); surrounding at least the electronic component (38) and the inner bonding areas (42) with a package body (20); and forming at least two groups of traces (34) into lead arrays (24) to permit the outer bonding areas (50) to contact and be bonded to the bonding lands (16) on a PCB (12).
Claim 6
Dependent Claim 100 words
A method according to claim 5, further comprising the steps of: providing test points (46), where the test point (46) is at the substrate periphery (44) further removed from the electronic component receiving area (36) than the outer bonding areas (50); affixing testing the package by probing the test points (46) after the electronic component (38) is surrounded with the package body (20); and to permit the outer bonding areas (50) to contact and be severing the substrate periphery (44) containing the test points (46) from the substrate (32) having the outer bonding areas (50) and the package body (20).

References Cited (Backward Citations)

No citation records indexed.

USPTO Annuity & Maintenance Windows

Maintenance schedule is calculated for granted US utility patents.

Assigned Categories & Tags

No categories assigned to this patent yet.

Assign Category Tag