A multilayer hybrid circuit

Claim 1

A multilayer hybrid circuit comprising an essentially flat-shaped laminated body which includes at least one selected from a capacitor, an inductor, a resistor, and an inner wiring portion which couples said capacitor, said inductor and/or said resistor with each other, and a plurality of side terminals provided on side walls of said laminated body for external connection of said capacitor, said inductor, and said resistor, said capacitor including a dielectric layer and conductive layers on said dielectric layer, said inductor including a dielectric magnetic layer and a plurality of conductive wire layers composing a coil by sandwiching said magnetic layer between conductive wire layers, said resistor including a dielectric layer and a resistor layer deposited on said dielectric layer together with a conductive layer as a lead line, said inner wiring portion having at least one dielectric layer, a conductive layer deposited on said dielectric layer according to desired wiring pattern, a coupling conductor penetrating said dielectric layers of at least one of said capacitor, said inductor, said resistor and said inner wiring portion, in perpendicular direction to dielectric layer plane, for connecting conductive patterns on different dielectric layers, at least one of said dielectric layers having a hole to accept said coupling conductor, and said coupling conductor comprising a plurality of elongated conductive chips in essentially S-shaped through said hole on said dielectric layer, each of said conductive chips being deposited partly on an adjacent conductor chip and partly on a dielectric layer so that succession of the conductor chips forms an elongated conductor perpendicular to dielectric layer plane through said holes on dielectric layers.