Patent EP0424019A2 successfully refreshed from Google Patents.
EP0424019A2
Expired / Lapsed
EP
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Field-effect-transistor with gate spacer
Assignee: AT&T Inc
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Filing: 1990-10-10
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Granted: —
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Expires: 2010-10-10
Abstract
Abstract A semiconductor integrated circuit structure and method of fabrication is disclosed. The structure includes a FET gate (e.g., 18) with adjacent double or triple-layered gate spacers (e.g., 21,23,19). The spacers permit precise tailoring of lightly doped drain junction profiles having deep and shallow junction portions. In addition, a sell-aligned silicide (e.g., 51) may be formed solely over the deep junction portion thus producing a reliable low contact resistance connection to source and drain.
Inventors
- 👤 Kuo-Hua Lee
- 👤 Chih-Yuan Lu
- 👤 Janmye Sung
Bibliographic Details
Application Number
—
Jurisdiction
EP
Data Source
google_patents
Last Synchronized
2026-11-03 20:01
CPC Classifications
H; H10; H10D; H10D30/00; H10D30/01; H10D30/021; H10D30/0223; H10D30/0227; H10D30/60; H10D64/00; H10D64/01; H10D64/021
Claims Analysis
Total Claims: 7
Claim 1
Independent Claim
102 words
A method of semiconductor fabrication comprising: forming a gate stack (e.g., 18) upon a substrate (e.g., 11); forming a first material layer (e.g., 19) upon said gate stack (e.g., 18) and upon said substrate (e.g., 11); forming a second material layer (e.g., 21) upon said first material layer (e.g., 19); forming a third material layer (e.g., 23) upon said second material layer (e.g.,21); CHARACTERIZED BY the further steps of anisotropically etching said third layer (e.g., 23) to form a first spacer (e.g., 23) and then etching said second layer (e.g., 21) to form a second spacer (e.g., 21) underlying said first spacer.
Claim 2
Independent Claim
102 words
A method of semiconductor fabrication comprising: forming a gate stack (e.g., 18) upon a substrate (e.g., 11); forming a first material layer (e.g., 19) upon said gate stack (e.g., 18) and upon said substrate (e.g., 11); forming a second material layer (e.g., 21) upon said first material layer (e.g., 19); forming a third material layer (e.g., 23) upon said second material layer (e.g.,21); CHARACTERIZED BY the further steps of anisotropically etching said third layer (e.g., 23) to form a first spacer (e.g., 23) and then etching said second layer (e.g., 21) to form a second spacer (e.g., 21) underlying said first spacer.
Claim 3
Dependent Claim
42 words
The method of claim 1 further including the steps of exposing said substrate (e.g., 11) to a dopant species (e.g., 31), said second spacer (e.g., 21) serving as a mask to at least partially block or absorb some of said dopant species.
Claim 4
Dependent Claim
88 words
The method of claim 1 further including the steps of exposing said substrate (e.g., 11) to a dopant species (e.g., 31), said first (e.g., 23) and second spacers (e.g., 21) serving as a mask to at least partially block or absorb some of said dopant species (e.g., 37); removing said first spacer (e.g., 23); exposing said substrate (e.g., 11) to a dopant species (e.g., 37), said second spacer (e.g., 21) serving as a mask to at least partially block or absorb some of said dopant species (e.g., 37).
Claim 5
Dependent Claim
20 words
The method of claim 1 further including the steps of forming a silicide (e.g., 51) upon said substate (e.g., 11).
Claim 6
Dependent Claim
58 words
The method of claim 1 wherein said gate stack (e.g., 18) includes a layer of polysilicon (e.g., 17) upon a layer of silicon dioxide (e.g., 15) and said first material layer (e.g., 19) is an oxide layer, said second material layer (e.g., 21) is a nitride layer and said third material layer (e.g., 23) is an oxide layer.
Claim 7
Independent Claim
23 words
The method of claims in which said first spacer (e.g., 23) has rounded sides and said second spacer (e.g., 21) has flat sides.
References Cited (Backward Citations)
No citation records indexed.
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