Claims Analysis
Total Claims: 12
Claim 1
Independent Claim
161 words
A system for fulfilling a bidimensional transform of dimension M*M, which has the property of being orthogonal and separable under the form of two monodimensional transforms, for which it exists a fast calculation process, the said system operating on incoming and outgoing words, that are written in the form of parallel bits, each of these words having a maximum length of 2 Mbits, and in the system inside the summations, subtractions and multiplications are made on variable data represented in the form of words having a length of 2 Mbits, so that operations of summation and subtraction between the variable data and the multiplication operations of the variable data by the fixed coefficients are made onto the data represented in the form of M couples of bits in serial form, so that the speed of the incoming and outgoing words, in the form of words with parallel bits, is equal to the speed of bit couples that represent the internal data.
Claim 2
Independent Claim
161 words
A system for fulfilling a bidimensional transform of dimension M*M, which has the property of being orthogonal and separable under the form of two monodimensional transforms, for which it exists a fast calculation process, the said system operating on incoming and outgoing words, that are written in the form of parallel bits, each of these words having a maximum length of 2 Mbits, and in the system inside the summations, subtractions and multiplications are made on variable data represented in the form of words having a length of 2 Mbits, so that operations of summation and subtraction between the variable data and the multiplication operations of the variable data by the fixed coefficients are made onto the data represented in the form of M couples of bits in serial form, so that the speed of the incoming and outgoing words, in the form of words with parallel bits, is equal to the speed of bit couples that represent the internal data.
Claim 3
Dependent Claim
163 words
A system according to claim 1, characterized in that for making the summation and subtraction operations of variable quantities represented in the form of bit couples serially distributed over the time and the operations of multiplication of the variable quantities by constants, the variable quantities being again represented by bit couples serially distributed over the time, are used two sole types of calculation elements, the one suitable for the summation or the subtraction of two variable quantities followed by the multiplication by 2 -m with m being an even integral number, and m ≧ 0, the second element being suitable for the summation or subtraction of two variable quantities followed by the multiplication by 2 -m , with m being an odd integral number, and m ≧ 0, the said calculation elements being differentiated only for the reason that the second element thereof holds a delay element for a clock period on a bit of each bit couple outgoing from the calculation element.
Claim 4
Independent Claim
35 words
A system according to claims 1 and/or 2, characterized in that the transform that is carried out is the discrete transform in cosine of dimension M*M, with M being equal to a power of 2.
Claim 5
Dependent Claim
28 words
A system according to claim 3, characterized in that the bidimensional transform has the dimension 8*8 and the variable data are internally represented with a 16 bit precision.
Claim 6
Independent Claim
9 words
A system substantially according to what described and represented.
Claim 7
Independent Claim
9 words
A system substantially according to what described and represented.
Claim 8
Dependent Claim
129 words
A circuit for the implementation of the system according to the former claims, characterized in that it includes at least: - means for converting the incoming words under the form of parallel bits into the form of words represented by means of coupled bits serially dsitributed over the time; - means for applying a monodimensional transform onto the lines of a block of M*M data, treating the data in the form of serially distributed bits; - means for the transposition from lines to columns of the elements of a block of M*M data; - means for carrying out the monodimensional transform onto the columns of the said data block M*M; - means for carrying out the conversion from serial bit couples to words in the form of parallel bits.
Claim 9
Dependent Claim
78 words
Circuit according to the claim 6, implemented onto silicium basis, characterized in that it includes: an input interface; a converter of incoming words from the form of parallel bits to the form of words represented by means of serial bit couples for the incoming words and viceversa for the outgoing words; a first operator for the monodimensional DCT transform; a transpositor from lines to columns; a second operator for monodimensional transform and a scaling device for outgoing words.
Claim 10
Dependent Claim
26 words
A circuit according to claims 6 and 7, in which it is used a summation and subtraction device as reprsented in the Figures 3a and 4a.
Claim 11
Dependent Claim
8 words
Circuit substantially according to what described and represented.
Claim 12
Dependent Claim
8 words
Circuit substantially according to what described and represented.