EP0410314A2 — Intelligent network interface circuit

Claim 1

Independent Claim 160 words

In a control system having a host processor (66; 140) which carries out control functions and a communications link (200; 201) connected to the control system, a communications interface circuit (141) which comprises: a protocol machine (251, 253) coupled to the communications link (200, 201) and being operable to transmit and receive message data on said communications link; an interface controller (222) coupled to the protocol machine and to the host processor (66; 140); a shared memory (211) coupled to the host processor and the interface controller for storing message data received by the protocol machine for reading by the host processor, for storing message data from the host processor for transmission by the protocol machine, and for storing negotiated parameters which determine the manner in which message data is conveyed between the host processor and the shared memory; and the interface controller (222) is operable during start-up to negotiate with the host processor the values of said negotiated parameters.

Claim 2

Dependent Claim 160 words

In a control system having a host processor (66; 140) which carries out control functions and a communications link (200; 201) connected to the control system, a communications interface circuit (141) which comprises: a protocol machine (251, 253) coupled to the communications link (200, 201) and being operable to transmit and receive message data on said communications link; an interface controller (222) coupled to the protocol machine and to the host processor (66; 140); a shared memory (211) coupled to the host processor and the interface controller for storing message data received by the protocol machine for reading by the host processor, for storing message data from the host processor for transmission by the protocol machine, and for storing negotiated parameters which determine the manner in which message data is conveyed between the host processor and the shared memory; and the interface controller (222) is operable during start-up to negotiate with the host processor the values of said negotiated parameters.

Claim 3

Dependent Claim 40 words

The communications interface circuit as recited in claim 1 in which one of the negotiated parameters indicates the number of data bits which are coupled between the host processor and the shared memory during a single read or write cycle.

Claim 4

Dependent Claim 40 words

The communications interface circuit as recited in claim 1 in which one of the negotiated parameters indicates the timing of a control signal during a read or write cycle of the shared memory which is initiated by the host processor.

Claim 5

Dependent Claim 27 words

The communications interface circuit as recited in claim 1 in which one of the negotiated parameters indicates the communications features which are available to the host processor.

Claim 6

Dependent Claim 60 words

The communications interface circuit as recited in claim 1 in which the interface controller and the host processor are coupled together by interrupt control lines and the interface controller proposes a negotiated parameter by writing a value of said parameter to a designated location in the shared memory and interrupting the operation of the host through an interrupt control line.

Claim 7

Dependent Claim 70 words

The communications interface circuit as recited in claim 5 in which the host processor responds to the interrupt from the interface controller by reading the value of the proposed parameter from the shared memory and if the proposed value is not acceptable to the host processor, writing a new value to the designated location in the shared memory and interrupting the operation of the interface controller through an interrupt line.

Claim 8

Dependent Claim 54 words

The communications interface circuit as recited in claim 6 in which the interface controller responds to the interrupt from the host processor by reading the value of the proposed parameter from the shared memory and terminating the negotiation of that parameter if it has the same value as that proposed by the interface controller.

Claim 9

Dependent Claim 35 words

The communications interface circuit as recited in claim 1 in which one of the negotiated parameters indicates whether the host processor is a low order byte first architecture or a high order byte first architecture.

Claim 10

Dependent Claim 146 words

A digital control system which comprises: a host processor (66; 140) which is operable in sresponse to a stored program to carry out specific tasks; a multi-bit host data bus (203) connected to the host processor for conveying data during a host processor read cycle and a host processor write cycle; a communications interface circuit (141) coupled to the host data bus and being operable to transmit message data written thereto by the host processor during a write cycle on a communications link (200, 201) and to receive message data from the communications link which can be read by the host processor during a read cycle; wherein the host processor (66; 140) includes negotiation means for negotiating the values of a set of parameters with the communications interface circuit which establishes how message data is to be conveyed between the host processor and the communications link.

Claim 11

Dependent Claim 146 words

A digital control system which comprises: a host processor (66; 140) which is operable in sresponse to a stored program to carry out specific tasks; a multi-bit host data bus (203) connected to the host processor for conveying data during a host processor read cycle and a host processor write cycle; a communications interface circuit (141) coupled to the host data bus and being operable to transmit message data written thereto by the host processor during a write cycle on a communications link (200, 201) and to receive message data from the communications link which can be read by the host processor during a read cycle; wherein the host processor (66; 140) includes negotiation means for negotiating the values of a set of parameters with the communications interface circuit which establishes how message data is to be conveyed between the host processor and the communications link.

Claim 12

Dependent Claim 92 words

The digital control system as recited in claim 9 in which the negotiation means includes: a) means responsive to an interrupt signal from the communications interface circuit for reading a proposed negotiable parameter therefrom through the host data bus; b) means for determining if the proposed negotiable parameter is acceptable to the host processor; and c) means for proposing alternative negotiable parameters including means for writing an alternative negotiable parameter to the communications interface circuit through the host data bus and means for producing an interrupt signal for the communications interface circuit.

Claim 13

Dependent Claim 44 words

The digital control system as recited in claim 9 in which the set of negotiable parameters includes the number of bits of data conveyed to and from the communications interface circuit on the host data bus during a read cycle and a write cycle.

Claim 14

Dependent Claim 39 words

The digital control system as recited in claim 9 in which the set of negotiable parameters includes a parameter which indicates whether the host processor is a low order byte first architecture or a high order byte first architecture.

Claim 15

Dependent Claim 47 words

The digital control system as recited in claim 9 in which the set of negotiable parameters includes a parameter which indicates the timing of a control signal during a read or write cycle in which data is coupled between the host processor and the communications interface circuit.

Claim 16

Dependent Claim 36 words

The digital control system as recited in claim 9 in which the set of negotiable parameters includes a parameter which indicates the communications features which are available to the host processor through the communications interface circuit.

Claim 17

Dependent Claim 122 words

The digital control system as recited in claim 9 in which the communications interface circuit includes: a protocol machine coupled to the communications link and being operable to transmit and receive message data on said communications link; an interface controller coupled to the protocol machine and to the host processor; a shared memory coupled to the host data bus and the interface controller for storing message data received by the protocol machine for reading by the host processor, for storing message data written thereto by the host processor for transmission by the protocol machine, and for storing the set of negotiable parameters; and the interface controller is operable during start-up to negotiate with the host processor the values of said negotiable parameters.

Claim 18

Dependent Claim 44 words

The digital control system as recited in claim 15 in which one of the negotiable parameters indicates the number of data bits which are conveyed to and from the shared memory on the host data bus during a read cycle and a write cycle.

Claim 19

Dependent Claim 42 words

The digital control system as recited in claim 15 in which one of the negotiable parameters indicates the timing of a control signal during a read or write cycle in which data is coupled between the host processor and the shared memory.

Claim 20

Dependent Claim 60 words

The digital control system as recited in claim 17 in which the interface controller and the host processor are coupled together by interrupt control lines and the interface controller proposed a negotiated parameter by writing a value of said parameter to a designated location in the shared memory and interrupting the operation of the host through an interrupt control line.

Claim 21

Dependent Claim 70 words

The digital control system as recited in claim 17 in which the host processor responds to the interrupt from the interface controller by reading the value of the proposed parameter from the shared memory and if the proposed value is not acceptable to the host processor, writing a new value to the designated location in the shared memory and interrupting the operation of the interface controller through an interrupt line.

Claim 22

Dependent Claim 54 words

The digital control system as recited in claim 19 in which the interface controller responds to the interrupt from the host processor by reading the value of the proposed parameter from the shared memory and terminating the negotiation of that parameter if it has the same value as that proposed by the interface controller.

Claim 23

Dependent Claim 35 words

The digital control system as recited in claim 15 in which one of the negotiable parameters indicates whether the host processor is a lower order byte first architecture or a higher order byte first architecture.

Intelligent network interface circuit

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