Patent EP0405523A2 successfully refreshed from Google Patents.
EP0405523A2
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EP
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Charge pump circuit
Assignee: Sony Corp
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Filing: 1990-06-27
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Granted: —
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Expires: 2010-06-27
Abstract
Abstract A charge pump circuit (21) for charging a capacitor (C₁,C₂) in response to a phase difference between first and second input signals comprises a constant current source (Q₃) for providing a first constant current (i₃); a constant current sink (Q₆) for absorbing a second constant current (i₆); circuit (11,12) for substantially equalizing the magnitudes of the first and second constant currents; and a switching circuit (Q₄,Q₅) for providing the first constant current and the second constant current flowing in opposed directions to the capacitor through an output terminal (T₂) of the charge pump circuit in response to the phase difference between the first and second input signals to produce a voltage level across the capacitor corresponding to the phase difference. In a phase locked loop system employing such a charge pump circuit, a phase comparator (4) produces a phase difference signal for controlling the provision of the first and second constant currents by the switching circuit to the capacitor. The capacitor acts as a loop filter (22) supplying the voltage thereacross as a control voltage to a voltage controlled oscillator (7) of the phase locked loop system.
Inventors
- 👤 Kotaro C/O Sony Corporation Takagi
- 👤 Satoshi C/O Sony Corporation Yokoya
Bibliographic Details
Application Number
—
Jurisdiction
EP
Data Source
google_patents
Last Synchronized
2026-10-28 22:39
CPC Classifications
H; H03; H03L; H03L7/00; H03L7/06; H03L7/08; H03L7/085; H03L7/089; H03L7/0891; H03L7/0895; H03L7/0898; H03L7/10; H03L7/107; H03L7/1075
Claims Analysis
Total Claims: 19
Claim 1
Independent Claim
149 words
A charge pump circuit (21) for charging capacitive means in response to a phase difference between first and second input signals, comprising: constant current source means (Q₃) for providing a first constant current (i₃); constant current sinking means (Q₆) for absorbing a second constant current (i₆); means (11,12) for substantially equalizing the magnitudes of the first constant current provided by said constant current source means and the second constant current absorbed by said constant current sinking means; an output terminal (T₂) adapted to be connected to a capacitive means; switching means (Q₄,Q₅) for providing said first constant current and said second constant current flowing in opposed directions through said output terminal (T₂) to the capacitive means (C₁,C₂) in response to said phase difference between said first and second input signals for selectively charging and discharging the capacitive means to produce a voltage level thereof corresponding to said phase difference.
Claim 2
Dependent Claim
149 words
A charge pump circuit (21) for charging capacitive means in response to a phase difference between first and second input signals, comprising: constant current source means (Q₃) for providing a first constant current (i₃); constant current sinking means (Q₆) for absorbing a second constant current (i₆); means (11,12) for substantially equalizing the magnitudes of the first constant current provided by said constant current source means and the second constant current absorbed by said constant current sinking means; an output terminal (T₂) adapted to be connected to a capacitive means; switching means (Q₄,Q₅) for providing said first constant current and said second constant current flowing in opposed directions through said output terminal (T₂) to the capacitive means (C₁,C₂) in response to said phase difference between said first and second input signals for selectively charging and discharging the capacitive means to produce a voltage level thereof corresponding to said phase difference.
Claim 3
Dependent Claim
92 words
The charge pump circuit according to claim 1, wherein said constant current source means comprises current source transistor means (Q₃) for providing said first constant current; (i₃) and said switching means comprises first switching transistor means (Q₄) for providing the capacitive means with said first constant current flowing through said output terminal in a first direction; said current source transistor means and said first switching transistor means being coupled in series between a power source terminal (T₃) of said charge pump circuit and said output terminal (T₂) of said charge pump circuit.
Claim 4
Dependent Claim
89 words
The charge pump circuit according to claim 2, wherein said constant current sinking means comprises current sinking transistor means (Q₆) for absorbing said second constant current, and said switching means further comprises second switching transistor means (Q₅) for providing the capacitive means with said second constant current flowing through said output terminal in a second direction; said current sinking transistor means and said second switching transistor means being coupled in series between said output terminal (T₂) of said charge pump circuit and a ground of said charge pump circuit.
Claim 5
Dependent Claim
43 words
The charge pump circuit according to claim 1, wherein said constant current source means comprises current source transistor means for providing said first constant current; and said switching means comprises first switching transistor means for bypassing current of said current source transistor means.
Claim 6
Dependent Claim
43 words
The charge pump circuit according to claim 4, wherein said constant current sinking means comprises current sinking transistor means for providing said second constant current; and said switching means comprises second switching transistor means for bypassing current of said current sinking transistor means.
Claim 7
Dependent Claim
66 words
The charge pump circuit according to claim 1, wherein said means (11) for substantially equalizing the magnitudes of the first and second constant currents comprises: means for producing a third constant current (i₁) substantially equal in magnitude to one of said first and second constant currents; and means for setting the other of said first and second constant currents substantially equal to said third constant current.
Claim 8
Dependent Claim
71 words
The charge pump circuit according to claim 6, wherein said means for producing a third constant current comprises: first current mirroring means (11) for producing said third constant current (i₁) such that said third constant current is substantially equal in magnitude to a predetermined reference current; and second current mirroring means (12) for substantially equalizing the magnitude of said one of said first and second constant currents and said reference current.
Claim 9
Dependent Claim
57 words
The charge pump circuit according to claim 7, wherein said means for setting the other of said first and second constant currents substantially equal to said third constant current includes third current mirroring means for substantially equalizing the magnitude of said other of said first and second constant currents with the magnitude of said third constant current.
Claim 10
Dependent Claim
43 words
The charge pump circuit according to claim 1, wherein the means for substantially equalizing the magnitudes of the first and second constant currents comprises means for maintaining said first constant current and said second constant current equal in magnitude to a reference current.
Claim 11
Dependent Claim
34 words
The charge pump circuit according to claim 9, further comprising means for adjusting the magnitude of the reference current to thereby adjust the magnitude of said first constant current and said second constant current.
Claim 12
Dependent Claim
25 words
The charge pump circuit according to claim 1, further comprising means for adjusting the magnitudes of said first constant current and said second constant current.
Claim 13
Dependent Claim
207 words
A phase locked loop system, comprising: means for receiving a reference signal; voltage controlled oscillator means (7) for producing a phase adjustable output signal controllable by a control voltage applied at a control terminal thereof; means (4) for producing a phase difference signal representative of a phase difference between said reference signal and said phase adjustable output signal of said voltage controlled oscillator means; means (21) for producing said control voltage including constant current source means (Q₃) for providing a first constant current (i₃); constant current sinking means (Q₆) for absorbing a second constant current (i₆); means (11,12) for substantially equalizing the magnitudes of the first constant current provided by said constant current source means and said second constant current absorbed by said constant current sinking means; capacitive means (C₁,C₂) for producing said control voltage; and switching means (Q₄,Q₅) for providing said first constant current and said second constant current flowing in opposed directions to said capacitive means in response to said phase difference signal for selectively charging and discharging said capacitive means to produce said control voltage corresponding to said phase difference signal; and means (22) for applying said control voltage produced by said capacitive means to said control terminal of said voltage controlled oscillator means.
Claim 14
Dependent Claim
207 words
A phase locked loop system, comprising: means for receiving a reference signal; voltage controlled oscillator means (7) for producing a phase adjustable output signal controllable by a control voltage applied at a control terminal thereof; means (4) for producing a phase difference signal representative of a phase difference between said reference signal and said phase adjustable output signal of said voltage controlled oscillator means; means (21) for producing said control voltage including constant current source means (Q₃) for providing a first constant current (i₃); constant current sinking means (Q₆) for absorbing a second constant current (i₆); means (11,12) for substantially equalizing the magnitudes of the first constant current provided by said constant current source means and said second constant current absorbed by said constant current sinking means; capacitive means (C₁,C₂) for producing said control voltage; and switching means (Q₄,Q₅) for providing said first constant current and said second constant current flowing in opposed directions to said capacitive means in response to said phase difference signal for selectively charging and discharging said capacitive means to produce said control voltage corresponding to said phase difference signal; and means (22) for applying said control voltage produced by said capacitive means to said control terminal of said voltage controlled oscillator means.
Claim 15
Dependent Claim
62 words
The phase locked loop system according to claim 12, wherein said capacitive means includes an input terminal (T₂) coupled with said switching means to receive said first constant current and said second constant current and a first capacitor (C₁) having a first terminal coupled with said input terminal of said capacitive means and a second terminal coupled with a reference voltage terminal.
Claim 16
Dependent Claim
39 words
The phase locked loop system according to claim 13, wherein said capacitive means further includes a second capacitor (C) and a resistor (R₃) coupled in series between said input terminal of said capacitive means and said reference voltage terminal.
Claim 17
Dependent Claim
23 words
The phase locked loop system according to claim 12, further comprising means for adjusting the loop gain of said phase locked loop system.
Claim 18
Dependent Claim
36 words
The phase locked loop system according to claim 15, wherein said means for adjusting the loop gain of said phase locked loop system comprises means for adjusting the magnitudes of said first and second constant currents.
Claim 19
Dependent Claim
40 words
The phase locked loop system of claim 15, wherein said means for adjusting the loop gain of said phase locked loop system is operative to adjust said loop gain substantially independently of a cut-off frequency characteristic of said capacitive means.
References Cited (Backward Citations)
No citation records indexed.
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