Patent EP0403147A2 successfully refreshed from Google Patents.
EP0403147A2
Expired / Lapsed
EP
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Line interface circuit and a method of testing such a circuit
Assignee: Texas Instruments Ltd
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Filing: 1990-06-06
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Granted: —
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Expires: 2010-06-06
Abstract
Abstract A line interface circuit sends two-level signals to a line and receives two-level signals from a line. The two levels of the signals are on opposite sides of a threshold range of levels. For testing the circuit the transmitter is connected to the receiver by a switchable path, and a test signal is produced by the transmitter for reception by the receiver for monitoring the functioning of the circuit. The test signal is of a small amplitude so as not to enter the threshold range of levels). The connections of the transmitter and receiver to the line are maintained during testing. During testing the output of the transmitter is limited in amplitude by a voltage clamp so that it can produce only the test signal.
Inventors
- 👤 Richard M. Kerslake
- 👤 Frank R. Fattori
Bibliographic Details
Application Number
—
Jurisdiction
EP
Data Source
google_patents
Last Synchronized
2026-11-09 17:34
CPC Classifications
H; H04; H04L; H04L1/00; H04L1/24; H04L1/242; H04L1/243
Claims Analysis
Total Claims: 15
Claim 1
Independent Claim
160 words
A line interface circuit having output means for feeding an output signal to a first conductor of the line, the output signal having parts with a steady level above a threshold range of levels and parts with a steady level below the threshold range of levels, input means for receiving an input signal from a second conductor of the line, and means for selectively applying a signal from the output means directly to the input means without traversing the line to enable the circuit to be tested, wherein the output means includes means for selectively producing a test signal on a steady level of the output signal and which is of such limited amplitude that it does not cross the threshold level, so that during a test it is not necessary to disconnect the output means from the line, and the input means includes means responsive to the test signal to provide an indication of the functioning of the circuit.
Claim 2
Dependent Claim
160 words
A line interface circuit having output means for feeding an output signal to a first conductor of the line, the output signal having parts with a steady level above a threshold range of levels and parts with a steady level below the threshold range of levels, input means for receiving an input signal from a second conductor of the line, and means for selectively applying a signal from the output means directly to the input means without traversing the line to enable the circuit to be tested, wherein the output means includes means for selectively producing a test signal on a steady level of the output signal and which is of such limited amplitude that it does not cross the threshold level, so that during a test it is not necessary to disconnect the output means from the line, and the input means includes means responsive to the test signal to provide an indication of the functioning of the circuit.
Claim 3
Dependent Claim
38 words
A circuit according to claim 1 in which the output means includes clamping means which is effective when the test signal is to be produced to limit the voltage so that it does not cross the threshold level.
Claim 4
Dependent Claim
111 words
A circuit according to claim 1 or 2 in which the output means includes an output circuit having first and second transistors connected in a series path between voltage supply conductors with the first conductor of the line connected to the junction of the first and second transistors, the steady levels of the output signal being produced by causing one of the first and second transistors to conduct and the other to be non-conducting, wherein during the production of the test signal the output current of the first transistor is limited in value and the clamping means is effective on the voltage at the junction of the first and second transistors.
Claim 5
Dependent Claim
62 words
A circuit according to claim 3 in which the series path includes resistive means between the first transistor and a voltage supply conductor, and the junction between the resistive means and the first transistor is connected to the means for selectively applying a signal to the input means so that the latter means can monitor the operational state of the first transistor.
Claim 6
Dependent Claim
59 words
A circuit according to any one of the preceding claims wherein the input means includes a transistor as its first stage, the second conductor of the line being connected to the base (or gate) of the transistor, and the means for selectively applying a signal to the input means being connected to the emitter (or source) of the transistor.
Claim 7
Dependent Claim
30 words
A circuit according to claim 5 wherein the means for selectively applying a signal to the input means applies a switched current to the emitter (or source) of the transistor.
Claim 8
Dependent Claim
29 words
A circuit according to any preceding claim wherein the output signals applied to the line and the input signals received from the line are in accordance with a standard.
Claim 9
Dependent Claim
14 words
A circuit according to claim 7 wherein the standard is EIA-R5232, EIA-RS423 or EIA-RS422.
Claim 10
Dependent Claim
16 words
A line interface circuit according to any one of preceding claims constructed as an integrated circuit.
Claim 11
Independent Claim
87 words
A method of testing a line interface circuit havina output means for feeding a two-level output signal to a line and input means for receiving a two-level input signal from a line, the method including providing a test signal in place of the output signal, connecting the output means directly to the input means and detecting the test signal in the input means, the test signal being such that it does not cross a threshold level between the two levels of the two-level input or output signal.
Claim 12
Independent Claim
87 words
A method of testing a line interface circuit havina output means for feeding a two-level output signal to a line and input means for receiving a two-level input signal from a line, the method including providing a test signal in place of the output signal, connecting the output means directly to the input means and detecting the test signal in the input means, the test signal being such that it does not cross a threshold level between the two levels of the two-level input or output signal.
Claim 13
Dependent Claim
26 words
A method according to claim 11 wherein the test signal is a small amplitude signal based on one of the two levels of the output signal.
Claim 14
Dependent Claim
27 words
A method according to claim 11 or 12 wherein the test signal is generated by clamping the output signal so that it cannot cross the threshold level.
Claim 15
Dependent Claim
34 words
13 A method according to claim 11, 12 or 13 including sending an additional signal from the output means to the input means indicating the functionality of an output transistor of the output means.
References Cited (Backward Citations)
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