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EP0396403A1
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Data stream frame synchronisation
Assignee: Nortel Networks Ltd
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Filing: 1990-05-02
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Granted: —
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Expires: 2010-05-02
Abstract
Abstract A data stream has frames of fixed, or variable but determined, length and includes a fixed length header at a predetermined position in the frame, which header has a linear systematic code structure including information digits and check digits. The check digits are employed for frame synchronisation detection, as well as error detection and correction, using, for example, a modified CRC (cyclic redundancy check) decoder.
Inventors
- 👤 Simon Daniel Brueckheimer
Bibliographic Details
Application Number
—
Jurisdiction
EP
Data Source
google_patents
Last Synchronized
2026-11-09 09:27
CPC Classifications
H; H03; H03M; H03M13/00; H03M13/33; H03M13/333; H04; H04L; H04L7/00; H04L7/04; H04L7/048; H03M13/03; H03M13/05; H03M13/09; H03M13/091; H03M13/13; H03M13/15
Claims Analysis
Total Claims: 18
Claim 1
Independent Claim
88 words
A method of detecting frame synchronisation of a data stream, which frames are of fixed length or of a variable but determined length indicated by a pattern or by information in the data stream, which frames include a fixed length header at a predetermined position in each frame, which header has a linear systematic code structure including information digits and check digits, characterised in that the check digits are employed for frame synchronisation detection without compromising their possible use for error detection in and correction of the header.
Claim 2
Independent Claim
88 words
A method of detecting frame synchronisation of a data stream, which frames are of fixed length or of a variable but determined length indicated by a pattern or by information in the data stream, which frames include a fixed length header at a predetermined position in each frame, which header has a linear systematic code structure including information digits and check digits, characterised in that the check digits are employed for frame synchronisation detection without compromising their possible use for error detection in and correction of the header.
Claim 3
Dependent Claim
59 words
A method as claimed in claim 1 characterised in that the header code structure is such that the check digits are derived from a polynomial representative of the information digits of the header, which polynomial has coefficients valid over a Galois field, by their polynomial division by a code generator polynomial whose coefficients are defined over a Galois field.
Claim 4
Dependent Claim
86 words
A method as claimed in claim 2 characterised in that a first incoming code word is divided by the code generator polynomial and a subsequent incoming code word is divided by the code generator polynomial, and wherein any remainder of the first division is compared with any remainder of the subsequent division, the presence of identical remainders indicating that the subsequent incoming code word is valid, a succession of valid code words once every determined frame length for a predetermined number of frames indicating frame synchronisation.
Claim 5
Dependent Claim
44 words
A method as claimed in claim 3 characterised in that the division is carried out in a decoder (11, 12) including a shift register and wherein the shift register is not reset to all zero preceding all divisions other than in the initial condition.
Claim 6
Dependent Claim
22 words
A method as claimed in claim 3 characterised in that it is carried out by means of a parallel implementation of apparatus.
Claim 7
Dependent Claim
22 words
A method as claimed in claim 4 characterised in that the received binary data stream is continuously monitored at all bit positions.
Claim 8
Dependent Claim
35 words
A method as claimed in claim 3 or claim 4 characterised in that the true remainder of an errored code word is obtained by modulo-Q addition of the remainders of the first and subsequent divisions.
Claim 9
Dependent Claim
146 words
A method as claimed in claim 2 characterised in that a said data stream as transmitted from a transmitter to a receiver at which latter said frame synchronisation detection is performed, including the step of adding at the transmitter a non-zero coset polynomial to the code to be transmitted, which added polynomial results in a large error when a cyclic shift of a code word, rather than a code word itself, is decoded, dividing a first incoming code word by the code generator polynomial, dividing a subsequent incoming code word by the code generator polynomial and comparing any remainder of the first division with that of the subsequent division, a difference between the said remainders corresponding to the coset polynomial indicating detection of a valid code word, a succession of valid code words once every frame length for a predetermined number of frames indicating frame synchronisation.
Claim 10
Dependent Claim
21 words
A method as claimed in claim 2 characterised in that the header code structure is a pure or shortened cyclic code.
Claim 11
Independent Claim
203 words
An apparatus for detecting frame synchronisation of a data stream, which frames are of fixed length or of a variable but determined length indicated by a pattern or by information in the data stream, which frames include a fixed length header at a predetermined position in each frame, which header has a linear systematic code structure including information digits and check digits, which check digits were derived from a polynomial representative of the information digits of the header, which polynomial has coefficients valid over a Galois field, by their polynomial division by a code generator polynomial whose coefficients are defined over a Galois field, the apparatus being characterised by means (12) whereby a first incoming code word is divided by the code generator polynomial, means (11) whereby a subsequent incoming code word is divided by the code generator polynomial, means (13,14) whereby any remainder of the first division is compared with any remainder of the subsequent division, the presence of a predetermined relationship therebetween indicating that the subsequent incoming code word is valid, and means for correlating and indicating frame synchronisation in response to receipt of a succession of valid code words once every predetermined frame length for a predetermined number of frames.
Claim 12
Independent Claim
203 words
An apparatus for detecting frame synchronisation of a data stream, which frames are of fixed length or of a variable but determined length indicated by a pattern or by information in the data stream, which frames include a fixed length header at a predetermined position in each frame, which header has a linear systematic code structure including information digits and check digits, which check digits were derived from a polynomial representative of the information digits of the header, which polynomial has coefficients valid over a Galois field, by their polynomial division by a code generator polynomial whose coefficients are defined over a Galois field, the apparatus being characterised by means (12) whereby a first incoming code word is divided by the code generator polynomial, means (11) whereby a subsequent incoming code word is divided by the code generator polynomial, means (13,14) whereby any remainder of the first division is compared with any remainder of the subsequent division, the presence of a predetermined relationship therebetween indicating that the subsequent incoming code word is valid, and means for correlating and indicating frame synchronisation in response to receipt of a succession of valid code words once every predetermined frame length for a predetermined number of frames.
Claim 13
Dependent Claim
18 words
Apparatus as claimed in claim 10 characterised in that the predetermined relationship requires the remainders to be identical.
Claim 14
Dependent Claim
86 words
Apparatus as claimed in claim 10 and for use with a data stream transmitted from a transmitter to a receiver at which latter the said frame synchronisation detection is performed, and characterised by means at the transmitter for adding a non-zero coset polynomial to the code to be transmitted, which added polynomial results in large error when a cyclic shift of a code word, rather than the code word itself, is detected, and wherein the predetermined relationship required the remainders to differ by the coset polynomial.
Claim 15
Dependent Claim
81 words
Apparatus as claimed in any one of claims 10 to 12 characterised in that the first and subsequent code word dividing means comprises first decoder means (11) for performing the division of one incoming code word by the code generator polynomial and second decoder means (12) for performing the division of a delayed version of the preceding incoming code word by the code generator polynomial. delay line means (10) being coupled between inputs of the first and second decoders (11, 12).
Claim 16
Dependent Claim
17 words
Apparatus as claimed in any one of claims 10 to 12 and characterised by a parallel implementation.
Claim 17
Dependent Claim
26 words
Apparatus as claimed in claim 13 as ap- pendent to claim 12 and characterised by means for applying the coset polynomial coefficients to the comparator means.
Claim 18
Dependent Claim
46 words
Apparatus as claimed in claim 13 or claim 15 characterised in that the decoders (11, 12) each include a respective shift register and employ linear feedback bv exclusive-or operations. and wherein the comparison means include respective exclusive-or elements (13) and a multi-mput logica! nor function (14).
References Cited (Backward Citations)
US3336467A
Cited
US3466601A
Cited
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