Patent EP0396346A1 successfully refreshed from Google Patents.
EP0396346A1
Expired / Lapsed
EP
⏱️ 0.0 years remaining
Error check or error correction code coding device
Assignee: Canon Inc
•
Filing: 1990-04-27
•
Granted: —
•
Expires: 2010-04-27
Abstract
Abstract An error check or correction code coding device is disclosed. In this device, when a main information code is transmitted after an error check or correction code is added thereto, a control code is included in a code group used in calculations upon generation of the error check or correction code, and a bit pattern of the control code is selected to remove a DC component of the bit pattern of the error check or correction code.
Inventors
- 👤 Akihiro Shikakura
- 👤 Tetsuya Shimizu
- 👤 Motokazu Kashida
Bibliographic Details
Application Number
—
Jurisdiction
EP
Data Source
google_patents
Last Synchronized
2026-11-08 08:07
CPC Classifications
H; H03; H03M; H03M13/00; H03M13/31; H03M13/03; H03M13/05; H03M13/09; H03M13/098
Claims Analysis
Total Claims: 31
Claim 1
Independent Claim
81 words
An error detection or error correction code coding device comprising: (a) operation means for operating a redundancy code for detecting or correcting an error using a code group including main information codes and a control code having no correlation with the main information codes; and (b) selection means for selecting a pattern of the control code from a plurality of patterns, said selection means selecting a pattern which can reduce a DC component of the redundancy code as much as possible.
Claim 2
Dependent Claim
81 words
An error detection or error correction code coding device comprising: (a) operation means for operating a redundancy code for detecting or correcting an error using a code group including main information codes and a control code having no correlation with the main information codes; and (b) selection means for selecting a pattern of the control code from a plurality of patterns, said selection means selecting a pattern which can reduce a DC component of the redundancy code as much as possible.
Claim 3
Dependent Claim
52 words
A device according to claim 1, wherein said operation means processes the codes in units of words each consisting of a predetermined number of bits, and the control code constitutes the word together with the main information code, the number of bits of which is smaller than the predetermined number of bits.
Claim 4
Dependent Claim
71 words
A device according to claim 2, wherein each of the main information codes consists of a word group including a compression code of n symbols ( n is an integer not less than 2) obtained by compressing a sample value of an information signal, and the word including the control code includes the compression code of m symbols ( m is an integer less than n ), and the control code.
Claim 5
Dependent Claim
68 words
A device according to claim 1, wherein the code group includes subinformation codes indicating other information associated with the main information code, said operation means processes codes in units of words each consisting of a predetermined number of bits, and the word including the control code includes the subinformation code, the number of bits of which is smaller than the predetermined number of bits, and the control code.
Claim 6
Dependent Claim
31 words
A device according to claim 1, further comprising: mapping encoding means for mapping-encoding an information signal to suppress a low-frequency component of the information signal, and outputting the main information codes.
Claim 7
Dependent Claim
24 words
A device according to claim 1, further comprising: detection means for detecting a low-frequency component of the redundancy code, and controlling said selection means.
Claim 8
Dependent Claim
28 words
A device according to claim 6, wherein said detection means includes DSV (Digital Sum Value) calculation means for calculating a DSV for a plurality of the redundancy codes.
Claim 9
Dependent Claim
44 words
A device according to claim 7, wherein said selection means includes memory means for storing a plurality of patterns of the control code, and outputting one of the plurality of patterns from an address in accordance with an output from said DSV calculation means.
Claim 10
Dependent Claim
48 words
A device according to claim 8, wherein said memory means receives the output from said DSV calculation means and the redundancy code as an address, and outputs the control code having a pattern corresponding to another redundancy code for canceling the DSV calculated by said DSV calculation means.
Claim 11
Dependent Claim
42 words
A device according to claim 6, wherein said selection means includes a data generating circuit which can generate the plurality of patterns of the control codes, and changes a pattern to be generated in accordance with the output from said detection means.
Claim 12
Dependent Claim
39 words
A device according to claim 10, wherein said selection means includes a counter for performing a count up operation in accordance with the output from said detection means, and uses an output from said counter as the control code.
Claim 13
Dependent Claim
77 words
An error detection or error correction code coding device comprising: (a) operating means for operating a redundancy code for detecting or correcting an error using a code group including main information codes and a control code having no correlation with the main information codes; (b) detection means for detecting a low-frequency component of the redundancy code; and (c) determination means for determining a pattern of the control code in accordance with an output from said detection means.
Claim 14
Dependent Claim
77 words
An error detection or error correction code coding device comprising: (a) operating means for operating a redundancy code for detecting or correcting an error using a code group including main information codes and a control code having no correlation with the main information codes; (b) detection means for detecting a low-frequency component of the redundancy code; and (c) determination means for determining a pattern of the control code in accordance with an output from said detection means.
Claim 15
Dependent Claim
66 words
A device according to claim 12, wherein said detection means includes DSV (Digital Sum Value) calculation means for calculating a DSV for a plurality of the redundancy codes, and said determination means includes memory means for storing a plurality of patterns of the control code, and outputting one of the plurality of patterns from an address in accordance with an output from said DSV calculation means.
Claim 16
Dependent Claim
39 words
A device according to claim 12, wherein said determination means includes a counter for performing a count up operation in accordance with the output from said detection means, and uses an output from said counter as the control code.
Claim 17
Dependent Claim
53 words
A device according to claim 12, wherein said operation means operates a plurality of words of the redundancy codes for detecting or correcting an error in accordance with the code group, and said detection means includes a plurality of detection circuits for detecting low-frequency components of the plurality of words of redundancy codes.
Claim 18
Dependent Claim
62 words
A device according to claim 12, wherein said determination means includes a code generating circuit for generating a plurality of code patterns in accordance with an output from one of said plurality of detection circuits, and a selection circuit for selecting one of the plurality of code patterns in accordance with the output from another one of said plurality of detection circuits.
Claim 19
Dependent Claim
25 words
A device according to claim 12, wherein said determination means determines the pattern of the control code by circularly using said plurality of detection circuits.
Claim 20
Dependent Claim
106 words
An error detection or error correction code coding device comprising: (a) operation means for operating a redundancy code for detecting or correcting an error using a code group including main information codes and a control code having no correlation with the main information codes; (b) transmission means for transmitting a code string in units of data frames each obtained by adding the redundancy code to the code group; (c) detection means for detecting a low-frequency component of a code previously transmitted by said transmission means; and (d) determination means for determining a pattern of the control code in accordance with an output from said detection means.
Claim 21
Dependent Claim
106 words
An error detection or error correction code coding device comprising: (a) operation means for operating a redundancy code for detecting or correcting an error using a code group including main information codes and a control code having no correlation with the main information codes; (b) transmission means for transmitting a code string in units of data frames each obtained by adding the redundancy code to the code group; (c) detection means for detecting a low-frequency component of a code previously transmitted by said transmission means; and (d) determination means for determining a pattern of the control code in accordance with an output from said detection means.
Claim 22
Dependent Claim
39 words
A device according to claim 18, wherein said selection means includes a counter for performing a count up operation in accordance with the output from said detection means, and uses an output from said counter as the control code.
Claim 23
Dependent Claim
27 words
A device according to claim 18, wherein said detection means includes DSV (Digital Sum Value) calculation means for calculating a DSV of the previously transmitted redundancy code.
Claim 24
Dependent Claim
44 words
A device according to claim 20, wherein said determination means includes memory means for storing a plurality of patterns of the control code, and outputting one of the plurality of patterns from an address in accordance with an output from said DSV calculation means.
Claim 25
Dependent Claim
56 words
A device according to claim 21, wherein said memory means outputs the pattern of the control code from an address according to an output from said DSV calculation means and the redundancy code, and a pattern of the redundancy code is changed in accordance with the pattern of the control code output from said memory means.
Claim 26
Dependent Claim
44 words
A device according to claim 20, wherein each of the data frames includes a plurality of words of redundancy codes, and said DSV calculation means includes a plurality of DSV calculation circuits for calculating the DSVs for the plurality of words of redundancy codes.
Claim 27
Dependent Claim
26 words
A device according to claim 23, wherein said determination means determines the pattern of the control code by circularly using said plurality of DSV calculation circuits.
Claim 28
Dependent Claim
63 words
A device according to claim 23, wherein said determination means includes a code generating circuit for generating a plurality of code patterns in accordance with an output from one of said plurality of DSV calculation circuits, and a selection circuit for selecting one of the plurality of code patterns in accordance with the output from one of said plurality of DSV calculation circuits.
Claim 29
Dependent Claim
37 words
A device according to claim 25, wherein said code generating circuit and said selection circuit are operated by circularly using said plurality of DSV calculation circuits, and use different ones of said plurality of DSV calculation circuits.
Claim 30
Dependent Claim
53 words
An information coding method or system in which information is coded into a word which includes an error detection and/or correction code, characterised in that values are selected for predetermined locations in the word and a corresponding error detection and/or correction code is selected which reduces the low frequency component of the word.
Claim 31
Dependent Claim
53 words
An information coding method or system in which information is coded into a word which includes an error detection and/or correction code, characterised in that values are selected for predetermined locations in the word and a corresponding error detection and/or correction code is selected which reduces the low frequency component of the word.
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
Maintenance schedule is calculated for granted US utility patents.