Claims Analysis
Total Claims: 16
Claim 1
Independent Claim
159 words
A semiconductor device comprising a plurality of arranged unit semiconductor devices (12,22), said unit semiconductor devices and elements in said semiconductor devices being selectively connected to one another by wires to thereby constitute a desired logic circuitry, characterized in that said unit semiconductor devices comprise at least a first insulated-gate type field-effect transistor (F N1 , F P1 ) of a first conductivity type and a second insulated-gate type field-effect transistor (F P1 , F N1 ) of a second conductivity type which is disposed adjacent to said first transistor and has a gate electrode (14P, 24N) separated from a gate electrode (14N, 24P) of the first transistor, said gate electrodes of the respective transistors have at least a gate terminal portion (T1,T1′,T2,T22) at the side adjacent to each other, and said gate terminal portion (T1′, T22) of the first field-effect transistor has at least a first wire connecting portion (t1) and a second wire connecting portion (t3, t12).
Claim 2
Dependent Claim
159 words
A semiconductor device comprising a plurality of arranged unit semiconductor devices (12,22), said unit semiconductor devices and elements in said semiconductor devices being selectively connected to one another by wires to thereby constitute a desired logic circuitry, characterized in that said unit semiconductor devices comprise at least a first insulated-gate type field-effect transistor (F N1 , F P1 ) of a first conductivity type and a second insulated-gate type field-effect transistor (F P1 , F N1 ) of a second conductivity type which is disposed adjacent to said first transistor and has a gate electrode (14P, 24N) separated from a gate electrode (14N, 24P) of the first transistor, said gate electrodes of the respective transistors have at least a gate terminal portion (T1,T1′,T2,T22) at the side adjacent to each other, and said gate terminal portion (T1′, T22) of the first field-effect transistor has at least a first wire connecting portion (t1) and a second wire connecting portion (t3, t12).
Claim 3
Dependent Claim
39 words
The semiconductor device as set forth in claim 1, wherein said gate terminal portions of said first and second transistors are connected integrally to said gate electrodes and are formed in the same layer of said gate electrodes, respectively.
Claim 4
Dependent Claim
25 words
The semiconductor device as set forth in claim 2, wherein said first and second transistors have channel regions which are oriented in the same direction.
Claim 5
Dependent Claim
51 words
The semiconductor device as set forth in claim 3, wherein said gate electrodes of the first and second transistors are provided with said gate terminal portions which are formed in the regions other than source or drain regions of said transistors and are designed to be wider than said gate electrodes.
Claim 6
Dependent Claim
76 words
The semiconductor device as set forth in claim 4, wherein said first wire connecting portion (t1) of the first transistor (F N1 ) and said gate terminal portion (T2) of the second transistor (F P1 ) are arranged on a first and second parallel grid lines, respectively, said first and second grid lines being included in a plurality of lateral and longitudinal lines defined by the routes along which said wires are intended to be arranged.
Claim 7
Dependent Claim
56 words
The semiconductor device as set forth in claim 5, wherein said first and second wire connecting portions (t1, t2) of the gate terminal portion (T1′) of the first transister F N1 are arranged on a third and fourth grid lines, respectively, said third and fouth grid lines being normal to said first and second grid lines.
Claim 8
Dependent Claim
46 words
The semiconductor device as set forth in claim 5, wherein said first and second wire connecting portions (t1, t12) the gate terminal portion (T22) of the first transistor (F P1 ) are arranged on a third grid line normal to said first and second grid lines.
Claim 9
Dependent Claim
149 words
The semiconductor device as set forth in claim 7, wherein said unit semiconductor device comprises a third insulated-gate type field-effect transistor (F P2 ) of the first conductivity type which is provided with a source or drain region common to that of said first transistor (F P1 ) and a gate electrode (15P) arranged parallel to the gate electrode (14P) of said first transistor, and a fourth insulated-gate type field-effect transistor (F N2 ) of the second conductivity type which is provided with a source or drain region common to that of said second transistor (F N1 ) and a gate electrode (15N) arranged parallel to the gate electrode (14N) of said second transistor, and wherein said unit semiconductor device further comprises a wire junction region (28) formed in an area surrounded by the first, second, third and fourth gate electrodes of said first, second, third and fourth transistors.
Claim 10
Dependent Claim
24 words
The semiconductor device as set forth in claim 8, wherein said wire junction region is formed in the same layer of said gate electrodes.
Claim 11
Dependent Claim
24 words
The semiconductor device as set forth in claim 6, wherein said gate terminal portion (T1′)of the first transistor (F N1 ) is substantially crank-shaped.
Claim 12
Dependent Claim
25 words
The semconductor device as set forth in claim 9, wherein said gate terminal portion (T22) of the first transistor (F P1 ) is substantially rectangular.
Claim 13
Dependent Claim
185 words
A semiconductor device comprising a plurality of arranged unit semiconductor devices, said unit semiconductor devices and elements in said semiconductor devices being selectively connected to one another by wires to thereby constitute a desired logic circuitry, characterized in that: each of said unit semiconductor devices comprises first and second insulated-gate type field-effect transistors of a first conductivity type and third and fouth insulated-gate type field-effect transistors of a second conductivity type, said first and second transistors being provided with gate electrodes arranged parallel to each other, and said third and fourth transistors being provided with gate electrodes arranged parallel to each other; each of said transistors is provided with a gate terminal portion of the gate electrode at the side adjacent to the other transistors; and, said gate terminal portion of the gate electrode of the first transistor comprises at least a first wire connecting portion integrally formed at the end of said gate electrode and a second wire connecting portion extended from said first wire connecting portion and located between said gate terminal portions of the gate electrodes of the third and fourth transistors.
Claim 14
Dependent Claim
185 words
A semiconductor device comprising a plurality of arranged unit semiconductor devices, said unit semiconductor devices and elements in said semiconductor devices being selectively connected to one another by wires to thereby constitute a desired logic circuitry, characterized in that: each of said unit semiconductor devices comprises first and second insulated-gate type field-effect transistors of a first conductivity type and third and fouth insulated-gate type field-effect transistors of a second conductivity type, said first and second transistors being provided with gate electrodes arranged parallel to each other, and said third and fourth transistors being provided with gate electrodes arranged parallel to each other; each of said transistors is provided with a gate terminal portion of the gate electrode at the side adjacent to the other transistors; and, said gate terminal portion of the gate electrode of the first transistor comprises at least a first wire connecting portion integrally formed at the end of said gate electrode and a second wire connecting portion extended from said first wire connecting portion and located between said gate terminal portions of the gate electrodes of the third and fourth transistors.
Claim 15
Dependent Claim
173 words
A semiconductor device comprising a plurality of arranged unit semiconductor devices, said unit semiconductor devices and elements in said semiconductor devices being selectively connected to one another by wires to thereby constitute a desired logic circuitry, characterized in that: each of said unit semiconductor devices comprises first and second insulated-gate type field-effect transistors of a first conductivity type and third and fouth insulated-gate type field-effect transistors of a second conductivity type, said first and second transistors being provided with gate electrodes arranged parallel to each other, and said third and fourth transistors being provided with gate electrodes arranged parallel to each other; each of said transistors is provided with a gate terminal portion of the gate electrode at the side adjacent to the other transistors; each of said gate terminal portions of the gate electrodes of the first and second transistors comprises at least first and second wire connecting portions; and, a wire junction area is formed in an area surrounded by the respective gate electrodes of said first, second, third and fourthtransistors.
Claim 16
Dependent Claim
173 words
A semiconductor device comprising a plurality of arranged unit semiconductor devices, said unit semiconductor devices and elements in said semiconductor devices being selectively connected to one another by wires to thereby constitute a desired logic circuitry, characterized in that: each of said unit semiconductor devices comprises first and second insulated-gate type field-effect transistors of a first conductivity type and third and fouth insulated-gate type field-effect transistors of a second conductivity type, said first and second transistors being provided with gate electrodes arranged parallel to each other, and said third and fourth transistors being provided with gate electrodes arranged parallel to each other; each of said transistors is provided with a gate terminal portion of the gate electrode at the side adjacent to the other transistors; each of said gate terminal portions of the gate electrodes of the first and second transistors comprises at least first and second wire connecting portions; and, a wire junction area is formed in an area surrounded by the respective gate electrodes of said first, second, third and fourthtransistors.