Sense amplifier

Claim 1

A sense amplifier (1) for determining the logic state of a semiconductor memory cell (N1, NV1), comprising: switch means (N2) for receiving the current passing through said memory cell, said current being at one level representing one logic state of the cell or at a second level, higher than the first level, representing a second logic state of the cell; comparing means (P2, P3, NV2) for comparing a representation of said current with a reference current to provide first or second comparison outputs dependent on whether the representation current is above or below said reference current respectively; and latch means (P4, P5, N4, N5) responsive to the output of the comparing means and latching into a first output state in response to one of said comparison output states; characterised in that said amplifier additionally comprises feedback means from the output of the latch means (P4, P5, N4, N5) to the switch means (N2) for switching off the latter to isolate the amplifier in its latched first output state from the memory cell when the current received by the switch means from the memory cell is at said second higher level.