Patent EP0366325A2 successfully refreshed from Google Patents.
EP0366325A2
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EP
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Variable length cache fill
Assignee: HP Inc
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Filing: 1989-10-16
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Granted: —
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Expires: 2009-10-16
Abstract
Abstract A method and apparatus for selectively filling a cache memory with a variable number of data words in response to the size and type of data transfer requested by the processor associated with the cache. According to the present invention a cache fill of either 16 or 64 bytes are provided. If there is a cache miss and an 8 byte word data transfer as requested, the larger fill is provided, similarly, if the 8 byte word data transfer is not requested, the shorter block of data provided, resulting in enhanced performance over a fixed length cache fill.
Inventors
- 👤 Paul Mageau
- 👤 John S. Yates
Bibliographic Details
Application Number
—
Jurisdiction
EP
Data Source
google_patents
Last Synchronized
2026-11-08 07:13
CPC Classifications
G; G06; G06F; G06F12/00; G06F12/02; G06F12/08; G06F12/0802; G06F12/0862; G06F2212/00; G06F2212/60; G06F2212/6026
Claims Analysis
Total Claims: 9
Claim 1
Independent Claim
168 words
A method of selectively accepting and storing into a cache memory and variable length of data from a main memory; requesting a transfer of data between a processor and a cache memory data having a corresponding indicia and at least a first and second length. determining if said indicia corresponding to the data to be transferred indicates the presence of the data in said cache; determining if the address transferred data is aligned to given length boundaries if said data is not present in said cache; selectively transferring from said main memory to said cache one of a third and a fourth length in response to the determination of the alignment of the data, wherein said second length is greater than said first length, said fourth length is greater than said third length, said third length is a higher multiple of said second length, and said fourth length of data is transferred if said second length is requested and is aligned to the beginning of said fourth length.
Claim 2
Independent Claim
168 words
A method of selectively accepting and storing into a cache memory and variable length of data from a main memory; requesting a transfer of data between a processor and a cache memory data having a corresponding indicia and at least a first and second length. determining if said indicia corresponding to the data to be transferred indicates the presence of the data in said cache; determining if the address transferred data is aligned to given length boundaries if said data is not present in said cache; selectively transferring from said main memory to said cache one of a third and a fourth length in response to the determination of the alignment of the data, wherein said second length is greater than said first length, said fourth length is greater than said third length, said third length is a higher multiple of said second length, and said fourth length of data is transferred if said second length is requested and is aligned to the beginning of said fourth length.
Claim 3
Dependent Claim
32 words
The method of claim 1, wherein said first and second length comprise 4 or less bytes and 8 bytes, respectively, and said third and fourth length comprise 16 and 64 bytes, respectively.
Claim 4
Dependent Claim
11 words
The method of claim 1, wherein said indicia comprises tag indicia.
Claim 5
Dependent Claim
19 words
The method of claim 1, wherein said data transfer comprises a data write from said processor into said cache.
Claim 6
Dependent Claim
35 words
The method of claim 1, further including the step of transferring from said main memory data having said third length if said first length of data is requested and is not present in said cache.
Claim 7
Dependent Claim
152 words
Apparatus for selectively loading a cache memory from an associated main memory, comprising with computer means for requesting a selected length data transfer with said cache of one of a first and a second data length; means for determining the presence of said data in said cache; means for determining the address alignment of said computer means requested cache data; means for selectively transferring data from an associated main memory to said cache having one of a third and a fourth length if said means for determining indicates said computer requested data is not in said cache, wherein said second length is greater than said first length, said fourth length is greater than said third length, said third length is a higher multiple of said second length, said fourth length of data is selectively transferred if said second length is requested and is not present in said cache and is naturally aligned.
Claim 8
Dependent Claim
152 words
Apparatus for selectively loading a cache memory from an associated main memory, comprising with computer means for requesting a selected length data transfer with said cache of one of a first and a second data length; means for determining the presence of said data in said cache; means for determining the address alignment of said computer means requested cache data; means for selectively transferring data from an associated main memory to said cache having one of a third and a fourth length if said means for determining indicates said computer requested data is not in said cache, wherein said second length is greater than said first length, said fourth length is greater than said third length, said third length is a higher multiple of said second length, said fourth length of data is selectively transferred if said second length is requested and is not present in said cache and is naturally aligned.
Claim 9
Dependent Claim
34 words
The apparatus of claim 6, wherein said first, second, third and fourth lengths comprise 4, 8, 16 and 64 bytes respectively and said natural alignment comprises data address of an integral multiple of 64.
References Cited (Backward Citations)
No citation records indexed.
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