Patent US4099535A successfully refreshed from Google Patents.
Patent EP0360992A2 successfully refreshed from Google Patents.
EP0360992A2
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A method of making a dielectric layer
Assignee: STMicroelectronics SRL
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Filing: 1989-07-12
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Granted: —
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Expires: 2009-07-12
Abstract
Abstract A dielectric layer of first interconnection for electronic semiconductor devices, specifically CMOS circuits, comprises a first thickness (11) of tetraethylorthosilicate which is overlaid by a layer (12) of self-planarizing siloxane. That layer provides a surface structure which is permissive of the subsequent conventional masking and electric contact attaching steps.
Inventors
- 👤 Fabio Gualandris
- 👤 Luisa Masini
Bibliographic Details
Application Number
—
Jurisdiction
EP
Data Source
google_patents
Last Synchronized
2026-10-31 16:51
CPC Classifications
H; H10; H10P; H10P14/00; H10P14/60; H10P14/69; H10P14/692; H10P14/6921; H10P14/6922; H10P14/63; H10P14/6326; H10P14/6328; H10P14/6334; H10P14/65; H10P14/6516; H10P14/6529; H10W; H10W20/00; H10W20/01; H10W20/071; H10W20/092; H10W20/40; H10W20/45; H10W20/48; H10P14/6336; H10P14/6342; H10P14/69215
Claims Analysis
Total Claims: 9
Claim 1
Independent Claim
31 words
A dielectric layer of first interconnection for electronic semiconductor devices, characterized in that it comprises a first thickness (11) of tetraethylorthosilicate on which a layer (12) of self-planarizing siloxane is superimposed.
Claim 2
Dependent Claim
31 words
A dielectric layer of first interconnection for electronic semiconductor devices, characterized in that it comprises a first thickness (11) of tetraethylorthosilicate on which a layer (12) of self-planarizing siloxane is superimposed.
Claim 3
Dependent Claim
64 words
An electronic semiconductor device (1) with dielectric of first interconnection, being of a type which comprises a semiconductor substrate (3) whereon variously doped zones or regions (5,6,7,8,9) are formed which map the device and are covered with a layer of said dielectric, characterized in that said layer comprises a first thickness (11) of tetraethylorthosilicate which is overlaid by a layer (12) of self-planarizing siloxane.
Claim 4
Dependent Claim
64 words
An electronic semiconductor device (1) with dielectric of first interconnection, being of a type which comprises a semiconductor substrate (3) whereon variously doped zones or regions (5,6,7,8,9) are formed which map the device and are covered with a layer of said dielectric, characterized in that said layer comprises a first thickness (11) of tetraethylorthosilicate which is overlaid by a layer (12) of self-planarizing siloxane.
Claim 5
Independent Claim
42 words
A method of making a dielectric layer of first interconnection for an electronic semiconductor device, characterized in that it comprises a step of deposition of a first layer of tetraethylorthosilicate followed by a step of deposition of a layer of self-planarizing siloxane.
Claim 6
Independent Claim
42 words
A method of making a dielectric layer of first interconnection for an electronic semiconductor device, characterized in that it comprises a step of deposition of a first layer of tetraethylorthosilicate followed by a step of deposition of a layer of self-planarizing siloxane.
Claim 7
Dependent Claim
26 words
A method according to Claim 3, characterized in that provided between said steps is a heat treatment under a nitrogen atmosphere having a predetermined time duration.
Claim 8
Dependent Claim
35 words
A method according to Claim 3, charactyerized in that, subsequently to the siloxane deposition step, at least one heat treatment step of predetermined duration is provided at a predetermined temperature under a low-pressure nitrogen atmosphere.
Claim 9
Dependent Claim
31 words
A method according to Claim 5, characterized in that it includes a further final heat treatment step carried out under a steam medium at atmospheric pressure for a predetermined time duration.
References Cited (Backward Citations)
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