Semiconductor integrated circuit device comprising conductive layers

Claim 2

A semiconductor integrated circuit device comprising: a semiconductor body (21); an insulation layer(32) formed on said body; a plurality of first conductive layers (33, 37, 42, 45, 52) formed in said insulation layer, for transmitting different signals; and a second conductive layer (39, 41, 43, 46) provided between the adjacent two of said first conductive layers and held at a constant potential.

Claim 3

A semiconductor integrated circuit device according to claim 1, characterized in that said second conductive layer (39, 41, 43, 44, 46, 51, 53) is held at the ground potential.

Claim 4

A semiconductor integrated circuit device according to claim 1, characterized in that said second conductive layer (39, 41, 43, 44, 46) is held at a power source potential.

Claim 5

A semiconductor integrated circuit device according to claim 1, characterized in taht said first conductive layer (33, 37, 42, 45, 52) is formed to extend in a predetermined direction and said second conductive layer (39, 41, 43, 44, 46) is formed to extend in the same direction as said first conductive layer.

Claim 6

A semiconductive integrated circuit device according to claim 2, characterized in that said second conductive layer (41, 43, 44, 46, 51, 53) is formed of at least two-layered conductive layers formed in said insulation layer.

Claim 7

A semiconductor integrated circuit device according to claim 5, characterized in that said at least two-layered conductive layers constituting said second conductive layer (41, 43, 44, 46, 51, 53) are electrically connected to each other via at least one connection electrode (47, 48, 54, 55) formed in said insulation layer, and said at least two-layered conduc­tive layers of said second conductive layer and the connection electrode for connecting said at least two-­layered conductive layers are formed to extend in a direction in which said two first conductive layers extend and are formed in a wall configuration to separate said two first conductive layers from each other.

Claim 8

A semiconductor integrated circuit device according to claim 6, characterized in that at least one hole is formed in a preset position of said connec­tion electrode (47, 48, 54, 55).

Claim 9

A semiconductor integrated circuit device according to claim 6, characterized in that said second conductive layer (41, 44, 51, 43, 46, 53) is formed of three-layered conductive layers including a first-­layered conductive layer (41, 43), a second-layered con­ductive layer (44, 46) and a third-layered conductive layer (51, 53), said first-layered conductive layer (41, 43) and second-layered conductive layer (44, 46) are electrically connected via a connection electrode (47, 48) and said second-layered conductive layer (44, 46) and third-layered conductive layer (51, 53) are electri­cally connected via a connection electrode (54, 55).

Claim 10

A semiconductor integrated circuit device comprising: a semiconductor body (21); an insulation layer(32) formed on said body; a first wiring (42) formed in said insulation layer by use of a first-layered conductive layer, for transmitting a preset signal; second and third wirings (41, 43) formed of said first-layered conductive layer, disposed in a horizontal direction in said insulation layer and separately on both sides of said first wiring (42), and each set at a constant potential; a fourth wiring (45) formed on said first wiring (42) by use of a second-layered conductive layer, for transmitting a preset signal; fifth and sixth wirings (44, 46) formed of said second-layered conductive layer, disposed in a horizon­tal direction in said insulation layer and separately on both sides of said fourth wiring (45) and positioned on the upper portions of said second and third wirings (41, 43), and set at a constant potential; a seventh wiring (37) formed of said second-layered conductive layer, disposed in a horizontal direction in said insulation layer and positioned in opposition to said fourth wiring (45) with said fifth wiring (44) set at the central position therebetween, for transmitting a preset signal; an eighth wiring (33) formed of said second-layered conductive layer, disposed in a horizontal direction in said insulation layer and positioned in opposition to said fourth wiring (45) with said sixth wiring (46) set at the central position therebetween, for transmitting a preset signal; a first connection electrode (47) formed between said second and fifth wirings (41 and 44) to electri­cally connect said second and fifth wirings (41 and 44); and a second connection electrode (48) formed between said third and sixth wirings (43 and 46) to electrically connect said third and sixth wirings (43 and 46).

Claim 11

A semiconductor integrated circuit device comprising: a semiconductor body (21); an insulation layer(32) formed on said body; a first wiring (42) formed in said insulation layer by use of a first-layered conductive layer, for transmitting a preset signal; second and third wirings (41, 43) formed of said first-layered conductive layer, disposed in a horizontal direction in said insulation layer and separately on both sides of said first wiring (42), and each set at a constant potential; a fourth wiring (45) formed on said first wiring (42) by use of a second-layered conductive layer, for transmitting a preset signal; fifth and sixth wirings (44, 46) formed of said second-layered conductive layer, disposed in a horizon­tal direction in said insulation layer and separately on both sides of said fourth wiring (45) and positioned on the upper portions of said second and third wirings (41, 43), and set at a constant potential; a seventh wiring (37) formed of said second-layered conductive layer, disposed in a horizontal direction in said insulation layer and positioned in opposition to said fourth wiring (45) with said fifth wiring (44) set at the central position therebetween, for transmitting a preset signal; an eighth wiring (33) formed of said second-layered conductive layer, disposed in a horizontal direction in said insulation layer and positioned in opposition to said fourth wiring (45) with said sixth wiring (46) set at the central position therebetween, for transmitting a preset signal; a first connection electrode (47) formed between said second and fifth wirings (41 and 44) to electri­cally connect said second and fifth wirings (41 and 44); and a second connection electrode (48) formed between said third and sixth wirings (43 and 46) to electrically connect said third and sixth wirings (43 and 46).

Claim 12

A semiconductor integrated circuit device according to claim 9, characterized in that at least one hole (49) is formed in a preset position of at least one of said first and second connection electrodes (47 and 48).

Claim 13

A semiconductor integrated circuit device comprising: a semiconductor body (21); an insulation layer(32) formed on said body; a first wiring (42) formed in said insulation layer by use of a first-layered conductive layer, for transmitting a preset signal; second and third wirings (41, 43) formed of said first-layered conductive layer, disposed in a horizontal direction in said insulation layer and separately on both sides of said first wiring (42), and each set at a constant potential; a fourth wiring (45) formed on said first wiring (42) by use of a second-layered conductive layer, for transmitting a preset signal; fifth and sixth wirings (44, 46) formed of said second-layered conductive layer, disposed in a horizon­tal direction in said insulation layer and separately on both sides of said fourth wiring (45) and positioned on the upper portions of said second and third wirings (41, 43), and set at a constant potential; a seventh wiring (37) formed of said second-layered conductive layer, disposed in a horizontal direction in said insulation layer and positioned in opposition to said fourth wiring (45) with said fifth wiring (44) set at the central position therebetween, for transmitting a preset signal; an eighth wiring (33) formed of said second-layered conductive layer, disposed in a horizontal direction in said insulation layer and positioned in opposition to said fourth wiring (45) with said sixth wiring (46) set at the central position therebetween, for transmitting a preset signal; a ninth wiring (52) formed on the upper portion of said fourth wiring (45) by use of a third-layered con­ductive layer, for transmitting a preset signal; tenth and eleventh wirings (51, 53) formed of said third-layered conductive layer, disposed in a horizontal direction in said insulation layer and separately on both sides of said ninth wiring (52) and positioned on the upper portions of said fifth and sixth wirings (44, 46), and set at a constant potential; a first connection electrode (47) formed between said second and fifth wirings (41 and 44) to electri­cally connect said second and fifth wirings (41 and 44); and a second connection electrode (48) formed between said third and sixth wirings (43 and 46) to electrically connect said third and sixth wirings (43 and 46); a third connection electrode (54) formed between said fifth and tenth wirings (44 and 51) to electrically connect said fifth and tenth wirings (44 and 51); and a fourth connection electrode (55) formed between said sixth and eleventh wirings (46 and 53) to electri­cally connect said sixth and eleventh wirings (46 and 53).

Claim 14

A semiconductor integrated circuit device comprising: a semiconductor body (21); an insulation layer(32) formed on said body; a first wiring (42) formed in said insulation layer by use of a first-layered conductive layer, for transmitting a preset signal; second and third wirings (41, 43) formed of said first-layered conductive layer, disposed in a horizontal direction in said insulation layer and separately on both sides of said first wiring (42), and each set at a constant potential; a fourth wiring (45) formed on said first wiring (42) by use of a second-layered conductive layer, for transmitting a preset signal; fifth and sixth wirings (44, 46) formed of said second-layered conductive layer, disposed in a horizon­tal direction in said insulation layer and separately on both sides of said fourth wiring (45) and positioned on the upper portions of said second and third wirings (41, 43), and set at a constant potential; a seventh wiring (37) formed of said second-layered conductive layer, disposed in a horizontal direction in said insulation layer and positioned in opposition to said fourth wiring (45) with said fifth wiring (44) set at the central position therebetween, for transmitting a preset signal; an eighth wiring (33) formed of said second-layered conductive layer, disposed in a horizontal direction in said insulation layer and positioned in opposition to said fourth wiring (45) with said sixth wiring (46) set at the central position therebetween, for transmitting a preset signal; a ninth wiring (52) formed on the upper portion of said fourth wiring (45) by use of a third-layered con­ductive layer, for transmitting a preset signal; tenth and eleventh wirings (51, 53) formed of said third-layered conductive layer, disposed in a horizontal direction in said insulation layer and separately on both sides of said ninth wiring (52) and positioned on the upper portions of said fifth and sixth wirings (44, 46), and set at a constant potential; a first connection electrode (47) formed between said second and fifth wirings (41 and 44) to electri­cally connect said second and fifth wirings (41 and 44); and a second connection electrode (48) formed between said third and sixth wirings (43 and 46) to electrically connect said third and sixth wirings (43 and 46); a third connection electrode (54) formed between said fifth and tenth wirings (44 and 51) to electrically connect said fifth and tenth wirings (44 and 51); and a fourth connection electrode (55) formed between said sixth and eleventh wirings (46 and 53) to electri­cally connect said sixth and eleventh wirings (46 and 53).

Claim 15

A semiconductor integrated circuit device according to claim 11, characterized in that at least one hole (49) is formed in a predetermined position of at least one of said first, second, third and fourth connection electrodes (47, 48, 54 and 55).