Patent EP0352020A2 successfully refreshed from Google Patents.
EP0352020A2
Expired / Lapsed
EP
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Semiconductor integrated circuit chip-to-chip interconnection scheme
Assignee: AT&T Inc
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Filing: 1989-07-13
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Granted: —
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Expires: 2009-07-13
Abstract
Abstract Integrated circuit chip-to-chip interconnections are made via gold pads (24, 34) on each chip (101, 102) that are bonded to corresponding gold pads (14, 12) on a silicon wafer chip carrier (10). The pads on the chips and/or the pads on the carrier are characterized by texturing (roughening) with a feature size of the order of a micrometer or less, so that each of the pads on the chip can be attached to each of the pads on the carrier by compression bonding at room temperature-- i.e., cold-well bonding. In particular, the texturing of the gold pads on the silicon carrier is obtained by etching V-grooves locally on the surface of the underlying silicon carrier in the regions of the pads, thermally growing a silicon dioxide layer on the silicon carrier, and depositing the gold on the silicon dioxide layer.
Inventors
- 👤 Greg E. Blonder
- 👤 Theodore Alan Fulton
Bibliographic Details
Application Number
—
Jurisdiction
EP
Data Source
google_patents
Last Synchronized
2026-10-30 20:38
CPC Classifications
H; H10; H10W; H10W70/00; H10W70/60; H10W70/67; H10W70/69; H10W70/698; H10W70/68; H10W72/00; H10W72/071; H10W72/20; H10W72/01; H10W72/012; H10W72/01251; H10W72/072; H10W72/07231; H10W72/07232; H10W72/07233; H10W72/07235; H10W72/07236; H10W72/231; H10W72/234; H10W72/251; H10W72/30; H10W72/351; H10W72/352; H10W72/50; H10W72/551; H10W72/552; H10W72/5522; H10W80/00; H10W80/301
Claims Analysis
Total Claims: 19
Claim 1
Independent Claim
84 words
In combination a semiconductor integrated circuit chip (101) having an integrated circuit connected to a plurality of metallic chip pads (24) located on a major surface of the chip CHARACTERIZED BY a carrier (10) upon which are located metallic wiring interconnections (13) having metallic carrier pads (14) that are bonded to the chip pads, each of the carrier pads, chip pads, or both having at least a portion thereof that is textured with a feature size of the order of one micrometer or less.
Claim 2
Dependent Claim
84 words
In combination a semiconductor integrated circuit chip (101) having an integrated circuit connected to a plurality of metallic chip pads (24) located on a major surface of the chip CHARACTERIZED BY a carrier (10) upon which are located metallic wiring interconnections (13) having metallic carrier pads (14) that are bonded to the chip pads, each of the carrier pads, chip pads, or both having at least a portion thereof that is textured with a feature size of the order of one micrometer or less.
Claim 3
Dependent Claim
83 words
The combination described in claim 1 in which each chip pad has a portion that is separated from the major surface of the chip by a localized layer of an insulating material, and in which each carrier pad has a second portion, underlying the chip pad in the complement of areas underlying the layer of insulating material, that is indented in the vertical direction and is smooth, the insulating material having relatively little or no adhesive tendency with respect to the chip pad.
Claim 4
Dependent Claim
13 words
The combination of claim 2 in which the carrier comprises a silicon wafer.
Claim 5
Dependent Claim
25 words
The combination of claim 3 in which the silicon wafer has a plurality of V-grooves at each of such portions thereof underlying the carrier pads.
Claim 6
Dependent Claim
15 words
The combination of claim 2 in which surfaces of the chip pads are essentially gold.
Claim 7
Dependent Claim
35 words
The combination of claim 5 in which surfaces of the carrier pads are essentially gold and in which the chip pads are nondestructively detachable from the carrier pads by means of a mechanical pulling apart.
Claim 8
Dependent Claim
25 words
The combination of claim 1 in which the chip carrier comprises a silicon wafer which is textured at the portions thereof underlying the carrier pads.
Claim 9
Dependent Claim
25 words
The combination of claim 7 in which the silicon wafer has a plurality of V-grooves at each of such portions thereof underlying the carrier pads.
Claim 10
Dependent Claim
16 words
The combination of claim 1 in which the feature size is about two micrometer or less.
Claim 11
Dependent Claim
41 words
The combination of claim 1 in which areas of the carrier pads to be bonded to chip pads are essentially gold and in which the chip pads are nondestructively detachable from the carrier pads by means of a mechanical pulling apart.
Claim 12
Dependent Claim
16 words
The combination of claim 10 in which the surfaces of the chip pads are essentially gold.
Claim 13
Dependent Claim
15 words
The combination of claim 1 in which surfaces of the chip pads are essentially gold.
Claim 14
Independent Claim
94 words
A method for bonding integrated circuit chips, each having a separate plurality of separate chip pads, to a carrier having carrier pads, each corresponding respectively to the chip pads, CHARACTERIZED BY the steps of (a) texturing the carrier pads, the chip pads, or both, the texturing having a feature size of the order of 1 micron or less; (b) pressing the chip pads against the corresponding carrier pads, with a predetermined pressure for a predetermined time interval in an ambient having a predetermined temperature, whereby the chip pads are bonded to the carrier pads.
Claim 15
Independent Claim
94 words
A method for bonding integrated circuit chips, each having a separate plurality of separate chip pads, to a carrier having carrier pads, each corresponding respectively to the chip pads, CHARACTERIZED BY the steps of (a) texturing the carrier pads, the chip pads, or both, the texturing having a feature size of the order of 1 micron or less; (b) pressing the chip pads against the corresponding carrier pads, with a predetermined pressure for a predetermined time interval in an ambient having a predetermined temperature, whereby the chip pads are bonded to the carrier pads.
Claim 16
Dependent Claim
29 words
The method of claim 13 in which the predetermined temperature is substantially room temperature and in which no material is interposed between the chip pads and the carrier pads.
Claim 17
Dependent Claim
41 words
The method of claim 13 in which areas of the carrier pads to be bonded to areas of the chip pads are coated essentially with gold and in which no material is interposed between the chip pads and the carrier pads.
Claim 18
Dependent Claim
64 words
The method of claim 15 in which the texturing of the carrier pads comprises the step of texturing a major surface of the carrier at areas thereof where the carrier pads are to be situated, and the carrier pads are thereafter deposited on the major surface of carrier, whereby the areas of the carrier pads to be bonded to chip pads are also textured.
Claim 19
Dependent Claim
16 words
The method of claim 15 in which the areas of the chip pads are essentially gold.
References Cited (Backward Citations)
No citation records indexed.
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