Patent EP0350610A2 successfully refreshed from Google Patents.
EP0350610A2
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EP
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Method of forming a bipolar transistor having self-aligned emitter-base using selective and non-selective epitaxy
Assignee: International Business Machines Corp
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Filing: 1989-06-01
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Granted: —
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Expires: 2009-06-01
Abstract
Abstract Bipolar transistors having self-aligned emitter-base regions and a method of forming such transistors using selective and non-selective epitaxy are disclosed. A substrate (12) of semiconductor material of a first conductivity type, a portion of which forms a collector region is provided. A first layer (18) of semiconductor material of a second conductivity type is deposited on said substrate, a portion of which forms an intrinsic base region. Over a portion of said first layer (18) an element (30) of insulating material is formed. Said intrinsic base region is formed below said element (30) and the remainder of said first layer forms an extrinsic base region. A second layer (32) of semiconductor material of said second conductivity type is deposited on said first layer (18). A portion of said second layer laterally overgrows onto a portion of an upper surface (33) of said element (30) defining an aperture (29) and leaving an exposed region (31) on the upper surface (33). The second layer (32) forms a portion of the extrinsic base region. On said second layer (32) a layer (42) of insulating material is formed which narrows said aperture (29) and said exposed region (31) of said element (30). Said narrowed exposed region (31) of said element (30) is removed to expose a portion (50) of said first layer (21) below said aperture (29) and an emitter region (54) of said first conductivity type is formed in said first layer (21) through said aperture (44).
Inventors
- 👤 Joachim N. Burghartz
- 👤 Barry J. Ginsberg
- 👤 Siegfried R. Mader
Bibliographic Details
Application Number
—
Jurisdiction
EP
Data Source
google_patents
Last Synchronized
2026-10-29 20:51
CPC Classifications
H; H10; H10D; H10D10/00; H10D10/01; H10D10/051; H10D10/054; H10D10/40; H10D10/441; Y; Y10; Y10S; Y10S148/00; Y10S148/011
Claims Analysis
Total Claims: 21
Claim 1
Independent Claim
229 words
A method for fabricating a bipolar transistor comprising the steps of: providing a substrate (12) of semiconductor material of a first conductivity type a portion of which forms a collector region; depositing a first layer (18) of semiconductor material of a second conductivity type on said substrate (12), a portion of which forms an intrinsic base region; forming an element of insulating material (30) over a portion of said first layer (18), said intrinsic base region being formed below said element (30) and the remainder of said first layer forming an extrinsic base region; depositing a second layer (32) of semiconductor material of said second conductivity type on said first layer (18), a portion of said second layer laterally overgrowing onto a portion of an upper surface (33) of said element (30) defining an aperture (29) and leaving an exposed region (31) on the upper surface (33), the second layer (32) forming a portion of the extrinsic base region; forming a layer (42) of insulating material on said second layer (32) which narrows said aperture (29) and said exposed region (31) of said element (30); removing said narrowed exposed region (31) of said element (30) to expose a portion (50) of said first layer (21) below said aperture (29); and forming an emitter region (54) of said first conductivity type in said first layer (21) through said aperture (44).
Claim 2
Independent Claim
229 words
A method for fabricating a bipolar transistor comprising the steps of: providing a substrate (12) of semiconductor material of a first conductivity type a portion of which forms a collector region; depositing a first layer (18) of semiconductor material of a second conductivity type on said substrate (12), a portion of which forms an intrinsic base region; forming an element of insulating material (30) over a portion of said first layer (18), said intrinsic base region being formed below said element (30) and the remainder of said first layer forming an extrinsic base region; depositing a second layer (32) of semiconductor material of said second conductivity type on said first layer (18), a portion of said second layer laterally overgrowing onto a portion of an upper surface (33) of said element (30) defining an aperture (29) and leaving an exposed region (31) on the upper surface (33), the second layer (32) forming a portion of the extrinsic base region; forming a layer (42) of insulating material on said second layer (32) which narrows said aperture (29) and said exposed region (31) of said element (30); removing said narrowed exposed region (31) of said element (30) to expose a portion (50) of said first layer (21) below said aperture (29); and forming an emitter region (54) of said first conductivity type in said first layer (21) through said aperture (44).
Claim 3
Dependent Claim
26 words
The method of claim 1 wherein the substrate (12) is provided with a mesa-like region (14) of said first conductivity type surrounded by isolation regions (16).
Claim 4
Dependent Claim
47 words
The method of claim 2 wherein the deposition of the first (18) and second layers (32) of semiconductor material of said second conductivity type are formed with single crystal material (20, 34) over said mesa-like portion (14) and polycrystalline material (22, 36) over said isolation regions (16).
Claim 5
Dependent Claim
25 words
The method of claim 2 and 3 wherein the element of insulating material (30) is formed over a portion of said single crystal material (20).
Claim 6
Independent Claim
33 words
The method of one or more of the preceding claims 1 to 4 wherein the step of depositing a first layer (18) of semiconductor material comprises non-selectively epitaxially growing said first layer (18).
Claim 7
Independent Claim
33 words
The method of one or more of the preceding claims 1 to 5 wherein the step of forming an element of insulating material (30) includes forming at least an oxidation barrier layer (24).
Claim 8
Dependent Claim
35 words
The method of claim 6 wherein the step of forming an element of insulating material (30) includes forming an oxide buffer layer (26) disposed between said first layer (18) and said oxidation barrier layer (24).
Claim 9
Independent Claim
25 words
The method of claims 6 and 7 wherein said oxidation barrier layer (24) comprises silicon nitride and said oxide buffer layer (26) comprises silicon dioxide.
Claim 10
Independent Claim
33 words
The method of one or more of the preceding claims 1 to 8 wherein the step of depositing said second layer (32) of semiconductor material comprises selectively epitaxially growing said second layer (32).
Claim 11
Dependent Claim
39 words
The method of claim 9 wherein the selective epitaxial deposition is performed under conditions whereby the width of said exposed region (31) on said upper surface (33) of said element (30) is 0.1 microns or less than 0.5 microns.
Claim 12
Independent Claim
53 words
The method of one or more of the preceding claims 1 to 10 wherein said element (30) has edges bounded in the (100) crystallographic direction, and said selective epitaxial layer (36) laterally overgrows said element (30) an amount equal to the vertical growth above said element thereby forming a substantially rectangular aperture (29).
Claim 13
Independent Claim
39 words
The method of one or more of the preceding claims 1 to 11 wherein the step of forming a layer of insulating material (42) on said second layer (32) comprises depositing a thermal oxide layer under high pressure conditions.
Claim 14
Independent Claim
40 words
The method of one or more of the preceding claims 1 to 12 wherein the step of forming said emitter region (54) includes providing a conductive element (52) within said aperture (44) through which said emitter region (54) is outdiffused.
Claim 15
Independent Claim
31 words
The method of one or more of the preceding claims 1 to 13 wherein the semiconductor material of the substrate (12) and the first (18) and second (32) layers is silicon.
Claim 16
Independent Claim
45 words
The method of one or more of the preceding claims 1 and 5 to 14 further including forming isolation regions within said substrate (12) and first (18) and second (32) layers of semiconductor material on both sides of and spaced from said emitter region (54).
Claim 17
Dependent Claim
187 words
A bipolar transistor preferably manufactured as described in one or more of the preceding claims 1 and 5 to 15 comprising: a single crystal semiconductor substrate (12) of a first conductivity type, a portion of which forms a collector region; a layer of semiconductor material (18, 32) of a second conductivity type disposed on said substrate (12), a portion of which forms an intrinsic base region (21); an element of insulating material (30) disposed over a portion of said layer of semiconductor material (18), said intrinsic base region (21) being formed below said element (30) and the remainder (20) of said layer forming an extrinsic base region; a trench (44) formed in said element (30) the bottom (50) of which is contiguous with said layer of semiconductor material (18); an emitter region (54) of said first conductivity type extending from the bottom (50) of said trench (44) and disposed within said layer of semiconductor material (18); and a conductive element (52) extending into said trench (44) contacting said emitter region (54), said conductive element (52) being disposed in insulated spaced relationship with said extrinsic base region (34).
Claim 18
Dependent Claim
58 words
The bipolar transistor of claim 16 wherein said insulated spaced relationship between said conductive element (52) and said extrinsic base region (34) is provided by a layer of insulating material (42) covering said layer of semiconductor material (32), said layer of insulating material (42) being coextensive with said trench (43) forming an insulating extension of said trench (43).
Claim 19
Dependent Claim
239 words
A bipolar transistor preferably manufactured as described in one or more of the preceding claims 1 to 14 comprising: a semiconductor substrate (12) of a first conductivity type having a mesa-like portion (14) which is surrounded by isolation regions (16); an element of insulating material (30) containing an aperture (29) being disposed over a portion of said mesa-like portion (14), said aperture (29) defining two upper surfaces (33) of said element (30); a layer of semiconductor material (18, 32) of a second conductivity type disposed over said substrate (12) and having a first single crystal portion disposed between said element and said mesa-like portion (14), a second single crystal portion (20, 34) in registry with said mesa-like portion (14), and a polycrystalline region (22, 36) extending over said isolation regions (16), said second single crystal portion (34) being laterally overgrown on a portion of each of said upper surfaces (33) of said element (30); a layer of insulating material (42) covering exposed surfaces of said layer of semiconductor material (18, 32), the portion of said layer of insulating material covering said laterally overgrown portion being coextensive with said aperture (44) forming an insulating extension of said aperature (44); an emitter region (54) of said first conductivity type disposed in said layer of semiconductor material (18) in registry with said aperture (44); and a conductive element (52) extending into said aperture (44) and said extension contacting said emitter region (54).
Claim 20
Dependent Claim
67 words
The bipolar transistor of one or more of the preceding claims 16 to 18 wherein the layer of semiconductor material of a second conductivity type comprises a layer of non-selective epitaxial silicon (18) deposited on said substrate (12) and a layer of selective epitaxial silicon (32) deposited on said non-selective epitaxial silicon (18), said selective epitaxial silicon (32) laterally overgrowing a portion of said insulating element (30).
Claim 21
Dependent Claim
26 words
The bipolar transistor of one or more of the preceding claims 16 to 19 further including a metallic contact (56) attached to said conductive element (52).
References Cited (Backward Citations)
No citation records indexed.
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