Patent EP0349664A1 successfully refreshed from Google Patents.
EP0349664A1
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Digital method and system for reproducing analog data
Assignee: RR Donnelley and Sons Co
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Filing: 1988-07-06
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Granted: —
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Expires: 2008-07-06
Abstract
Abstract There is disclosed herein a method of and system for reproducing an analog signal using digital techniques. The system includes means for encoding the analog signal in digital form and means for decoding the encoded analog signal. The encoding means includes means for detecting the upper bandwidth limit of the input analog signal during each of a plurality of successive sample intervals. Means coupled to the detecting means are included for sampling the input analog signal at a sampling rate determined in accordance with the detected upper bandwidth limits to derive a series of voltage levels which together define a sampled approximation of the input analog signal. Means are coupled to the sampling means for converting each voltage level and the sampling rate at which such voltage level was derived into digital signals. Also included are means for detecting when the input analog signal is at substantially a zero level, means for developing a digital indication of the length of time the signal is at such level and means for combining the digital indication with the digital signals to develop a digital representation of the input analog signal. The decoding means includes means for sequentially retrieving the digital signals, means coupled to the retrieving means for converting the digital signals into the sampled approximation of the input analog signal and a low-pass filter coupled to the converting means having a cut-off frequency determined in accordance with the encoded sampling rate for filtering the sampled approximation to reproduce the input analog signal.
Inventors
- 👤 J. B. Podolak
- 👤 Douglas R. Adler
- 👤 Ronald B. Saluski
Bibliographic Details
Application Number
—
Jurisdiction
EP
Data Source
google_patents
Last Synchronized
2026-11-09 12:48
CPC Classifications
H; H03; H03M; H03M1/00; H03M1/12; H03M1/124; H03M1/1245; H03M1/1265; H03M1/127; G; G11; G11B; G11B20/00; G11B20/10; G11B20/10527
Claims Analysis
Total Claims: 22
Claim 1
Independent Claim
75 words
A method of encoding an analog signal in digital form, comprising the steps of: (a) analyzing the analog signal to detect the upper bandwidth limit thereof; (b) sampling the analog signal at a variable sampling rate determined in accordance with the determined upper bandwidth limit to derive a sequence of voltage levels; and (c) generating a plurality of digital signals representing the sampling rate at which the analog signal was sampled and each voltage level.
Claim 2
Independent Claim
75 words
A method of encoding an analog signal in digital form, comprising the steps of: (a) analyzing the analog signal to detect the upper bandwidth limit thereof; (b) sampling the analog signal at a variable sampling rate determined in accordance with the determined upper bandwidth limit to derive a sequence of voltage levels; and (c) generating a plurality of digital signals representing the sampling rate at which the analog signal was sampled and each voltage level.
Claim 3
Independent Claim
141 words
A method of encoding an analog signal as a series of digital signals, comprising the steps of: generating a digital duration signal representing the period of time during which the analog signal is at substantially a zero level; generating a digital silence signal when the analog signal is at substantially a zero level; converting the portions of the analog signal which are at levels other than substantially the zero level into a series of digital words including the steps of detecting the upper bandwidth limit of the analog signal and sampling the analog signal at a variable sampling rate determined in accordance with the detected upper bandwidth limit to derive a sampled approximation of the analog signal; and combining the digital silence signal with the digital duration signal and the series of digital words to derive the series of digital signals.
Claim 4
Independent Claim
141 words
A method of encoding an analog signal as a series of digital signals, comprising the steps of: generating a digital duration signal representing the period of time during which the analog signal is at substantially a zero level; generating a digital silence signal when the analog signal is at substantially a zero level; converting the portions of the analog signal which are at levels other than substantially the zero level into a series of digital words including the steps of detecting the upper bandwidth limit of the analog signal and sampling the analog signal at a variable sampling rate determined in accordance with the detected upper bandwidth limit to derive a sampled approximation of the analog signal; and combining the digital silence signal with the digital duration signal and the series of digital words to derive the series of digital signals.
Claim 5
Independent Claim
145 words
A method of encoding an analog signal as a series of digital signals, comprising the steps of: generating a digital silence signal when the analog signal is at substantially a zero level; enabling a counter while the silence signal is generated to derive a first set of digital words representing the length of time the analog signal is at substantially the zero level; converting the remaining portions of the analog signal not at substantially the zero level into a second set of digital words including the steps of detecting the upper bandwidth limit of the analog signal and sampling the remaining portions at a variable sampling rate selected in accordance with the detected upper bandwidth limit to derive a sampled approximation of the analog signal; and combining the first and second sets of digital words with the digital silence signal to derive the digital signals.
Claim 6
Independent Claim
145 words
A method of encoding an analog signal as a series of digital signals, comprising the steps of: generating a digital silence signal when the analog signal is at substantially a zero level; enabling a counter while the silence signal is generated to derive a first set of digital words representing the length of time the analog signal is at substantially the zero level; converting the remaining portions of the analog signal not at substantially the zero level into a second set of digital words including the steps of detecting the upper bandwidth limit of the analog signal and sampling the remaining portions at a variable sampling rate selected in accordance with the detected upper bandwidth limit to derive a sampled approximation of the analog signal; and combining the first and second sets of digital words with the digital silence signal to derive the digital signals.
Claim 7
Dependent Claim
120 words
Apparatus for encoding input analog signals in digital form, comprising: means for detecting the upper bandwidth limit of the input analog signal during each of a plurality of successive sampling intervals; means coupled to the detecting means for sampling the input analog signals during each sampling interval at a sampling rate determined in accordance with a detected upper bandwidth limit to derive a series of analog voltage levels of differing time duration which together define a sampled approximation of the input analog signal; and means coupled to the sampling means for converting each analog voltage level and the sampling rate at which such voltage level was derived into digital signals to develop a digital representation of the input analog signal.
Claim 8
Dependent Claim
120 words
Apparatus for encoding input analog signals in digital form, comprising: means for detecting the upper bandwidth limit of the input analog signal during each of a plurality of successive sampling intervals; means coupled to the detecting means for sampling the input analog signals during each sampling interval at a sampling rate determined in accordance with a detected upper bandwidth limit to derive a series of analog voltage levels of differing time duration which together define a sampled approximation of the input analog signal; and means coupled to the sampling means for converting each analog voltage level and the sampling rate at which such voltage level was derived into digital signals to develop a digital representation of the input analog signal.
Claim 9
Independent Claim
118 words
An apparatus for encoding input analog signals in digital form, comprising: means for detecting the upper bandwidth limit of the input analog signal during each of a plurality of successive sampling intervals; means coupled to the detecting means for sampling the input analog signals during each sampling interval at a sampling rate determined in accordance with the detected upper bandwidth limit for that interval to derive a series of voltage levels which together define a sampled approximation of the input analog signal; and means coupled to the sampling means for converting each voltage level and the sampling rate at which such voltage level was derived into digital signals to develop a digital representation of the input analog signal.
Claim 10
Independent Claim
118 words
An apparatus for encoding input analog signals in digital form, comprising: means for detecting the upper bandwidth limit of the input analog signal during each of a plurality of successive sampling intervals; means coupled to the detecting means for sampling the input analog signals during each sampling interval at a sampling rate determined in accordance with the detected upper bandwidth limit for that interval to derive a series of voltage levels which together define a sampled approximation of the input analog signal; and means coupled to the sampling means for converting each voltage level and the sampling rate at which such voltage level was derived into digital signals to develop a digital representation of the input analog signal.
Claim 11
Independent Claim
162 words
A system for encoding an analog input signal in digital form as a series of digital words and for decoding the digital words to reproduce the analog input signal, comprising: encoding apparatus including means for detecting the upper bandwidth limit of the analog input signal during successive intervals, means coupled to the detecting means for sampling the analog input signal during each interval at a sampling rate selected in dependence upon a detected upper bandwidth limit to derive a series of analog voltage levels of varying widths which together define a sampled approximation of the analog input signal and means coupled to the sampling means for converting the analog voltage levels and the sampling rates into the series of digital words; and decoding apparatus coupled to the encoding apparatus including means for converting the series of digital words back into the sampled approximation and means responsive to the converted sampling rate for filtering the sampled approximation to reproduce the analog input signal.
Claim 12
Independent Claim
162 words
A system for encoding an analog input signal in digital form as a series of digital words and for decoding the digital words to reproduce the analog input signal, comprising: encoding apparatus including means for detecting the upper bandwidth limit of the analog input signal during successive intervals, means coupled to the detecting means for sampling the analog input signal during each interval at a sampling rate selected in dependence upon a detected upper bandwidth limit to derive a series of analog voltage levels of varying widths which together define a sampled approximation of the analog input signal and means coupled to the sampling means for converting the analog voltage levels and the sampling rates into the series of digital words; and decoding apparatus coupled to the encoding apparatus including means for converting the series of digital words back into the sampled approximation and means responsive to the converted sampling rate for filtering the sampled approximation to reproduce the analog input signal.
Claim 13
Independent Claim
218 words
A system for encoding an analog input signal in digital form as a series of digital words and for decoding the digital words to reproduce the analog input signal, comprising: encoding means including a real time analyzer for detecting the upper bandwidth limit of the input analog signal, a one-of-fifteen selector responsive to the output of the real time analyzer for passing one of fifteen clock signals to an output thereof, an input low-pass filter coupled to the output of the one-of-fifteen selector and to the input analog signal for filtering such signal and having a variable cut-off frequency determined by the output of the one-of-fifteen selector, means for sampling the filtered analog input signal at a sampling rate determined by the output of the one-of-fifteen selector to derive a staircase approximation of the analog input signal, and means for converting the staircase approximation of the analog input signal into a series of digital words; and a decoding apparatus including means for sequentially latching the digital words, a digital to-analog (D/A) converter responsive to the sequentially latched words for recreating the staircase approximation of the analog input signal, and an output low-pass filter having a variable cut-off frequency determined in accordance with the sampling rate for each portion of the staircase approximation to reproduce the analog input signal.
Claim 14
Independent Claim
218 words
A system for encoding an analog input signal in digital form as a series of digital words and for decoding the digital words to reproduce the analog input signal, comprising: encoding means including a real time analyzer for detecting the upper bandwidth limit of the input analog signal, a one-of-fifteen selector responsive to the output of the real time analyzer for passing one of fifteen clock signals to an output thereof, an input low-pass filter coupled to the output of the one-of-fifteen selector and to the input analog signal for filtering such signal and having a variable cut-off frequency determined by the output of the one-of-fifteen selector, means for sampling the filtered analog input signal at a sampling rate determined by the output of the one-of-fifteen selector to derive a staircase approximation of the analog input signal, and means for converting the staircase approximation of the analog input signal into a series of digital words; and a decoding apparatus including means for sequentially latching the digital words, a digital to-analog (D/A) converter responsive to the sequentially latched words for recreating the staircase approximation of the analog input signal, and an output low-pass filter having a variable cut-off frequency determined in accordance with the sampling rate for each portion of the staircase approximation to reproduce the analog input signal.
Claim 15
Independent Claim
122 words
A method of decoding an analog signal which is digitally encoded with first sets of bits representing the analog signal amplitude, second sets of bits representing the analog signal band width and third sets of bits representing whether the analog signal is substantially at a zero level, comprising the steps of: converting successive first sets of bits into successive signals, each with an amplitude determined by the first set of bits; filtering the successive signals by means of a variable cut-off frequency filter; establishing the cut-off frequency of the filter in accordance with successive second sets of bits; and inhibiting the output of the filter when the third sets of bits indicate that the analog signal is at substantially the zero level.
Claim 16
Independent Claim
122 words
A method of decoding an analog signal which is digitally encoded with first sets of bits representing the analog signal amplitude, second sets of bits representing the analog signal band width and third sets of bits representing whether the analog signal is substantially at a zero level, comprising the steps of: converting successive first sets of bits into successive signals, each with an amplitude determined by the first set of bits; filtering the successive signals by means of a variable cut-off frequency filter; establishing the cut-off frequency of the filter in accordance with successive second sets of bits; and inhibiting the output of the filter when the third sets of bits indicate that the analog signal is at substantially the zero level.
Claim 17
Independent Claim
178 words
A method of decoding a digital representation of an analog signal, the digital representation including a first set of digital signals each representing the level of a sample of the analog signal, a second set of digital signals each representing the duration of a sample, a third set of digital signals indicating when the analog signal is at substantially a zero level and a fourth set of digital signals indicating the duration of time such signal is at the substantially zero level, comprising the steps of: generating a multi-level signal having levels determined by the first set of digital signals and durations determined by the second set of digital signals: filtering the multi-level signal by means of a low-pass filter; selecting the cut-off frequency of the low pass filter in dependence upon the second set of digital signals to derive the analog signal; and inhibiting the output of the low pass filter when the third and fourth signals indicate that the analog signal is at a substantially zero level to reproduce the substantially zero levels during such time.
Claim 18
Independent Claim
178 words
A method of decoding a digital representation of an analog signal, the digital representation including a first set of digital signals each representing the level of a sample of the analog signal, a second set of digital signals each representing the duration of a sample, a third set of digital signals indicating when the analog signal is at substantially a zero level and a fourth set of digital signals indicating the duration of time such signal is at the substantially zero level, comprising the steps of: generating a multi-level signal having levels determined by the first set of digital signals and durations determined by the second set of digital signals: filtering the multi-level signal by means of a low-pass filter; selecting the cut-off frequency of the low pass filter in dependence upon the second set of digital signals to derive the analog signal; and inhibiting the output of the low pass filter when the third and fourth signals indicate that the analog signal is at a substantially zero level to reproduce the substantially zero levels during such time.
Claim 19
Independent Claim
266 words
An apparatus for decoding a digital representation of an analog signal stored on a storage medium, such representation comprising a sequence of digital words each of which includes bits representing a level of the analog signal and bits representing a sampling rate of which the analog signal level was encoded, the analog signal levels together comprising a sampled approximation of the analog signal, comprising: means for retrieving the digital words from the storage medium; means coupled to the retrieving means for converting the digital words into the sampled approximation of the analog signal; a filter coupled to the converting means having a cut-off frequency determined in accordance with the encoded sampling rate for filtering the sampled approximation to reproduce the analog signal; and a data switch coupled to the retrieving means having a control input which receives the digital words and two outputs, the data switch providing a retrieved digital word at one of the outputs when a control bit of a digital word coupled to the control input is in a first state and providing the retrieved digital word at the other of the outputs when the control bit of the digital word is in a second state, the converting means being coupled to one of the outputs and a programmable counter coupled to the other of the outputs wherein the converting means and the programmable counter include outputs coupled to the retrieving means for causing the retrieving means to retrieve a next digital word after one of the digital words has been retrieved and provided to either the converting means or the programmable counter.
Claim 20
Independent Claim
266 words
An apparatus for decoding a digital representation of an analog signal stored on a storage medium, such representation comprising a sequence of digital words each of which includes bits representing a level of the analog signal and bits representing a sampling rate of which the analog signal level was encoded, the analog signal levels together comprising a sampled approximation of the analog signal, comprising: means for retrieving the digital words from the storage medium; means coupled to the retrieving means for converting the digital words into the sampled approximation of the analog signal; a filter coupled to the converting means having a cut-off frequency determined in accordance with the encoded sampling rate for filtering the sampled approximation to reproduce the analog signal; and a data switch coupled to the retrieving means having a control input which receives the digital words and two outputs, the data switch providing a retrieved digital word at one of the outputs when a control bit of a digital word coupled to the control input is in a first state and providing the retrieved digital word at the other of the outputs when the control bit of the digital word is in a second state, the converting means being coupled to one of the outputs and a programmable counter coupled to the other of the outputs wherein the converting means and the programmable counter include outputs coupled to the retrieving means for causing the retrieving means to retrieve a next digital word after one of the digital words has been retrieved and provided to either the converting means or the programmable counter.
Claim 21
Independent Claim
145 words
An apparatus for decoding a digital representation of an analog signal stored on a storage medium, such representation comprising a sequence of digital words each of which includes bits representing a level of the analog signal and bits representing a sampling rate at which the analog signal level was encoded, the analog signal levels together comprising a sampled approximation of the analog signal, comprising: means for sequentially retrieving the digital words from the storage medium; means coupled to the retrieving means for converting the digital words into the sampled approximation of the analog signal; a filter coupled to the converting means having a cutoff frequency determined in accordance with the encoded sampling rate for filtering the sampled approximation to reproduce the analog signal; and means for inhibiting the output of the filter when the analog signal to be reproduced is at substantially a zero level.
Claim 22
Independent Claim
145 words
An apparatus for decoding a digital representation of an analog signal stored on a storage medium, such representation comprising a sequence of digital words each of which includes bits representing a level of the analog signal and bits representing a sampling rate at which the analog signal level was encoded, the analog signal levels together comprising a sampled approximation of the analog signal, comprising: means for sequentially retrieving the digital words from the storage medium; means coupled to the retrieving means for converting the digital words into the sampled approximation of the analog signal; a filter coupled to the converting means having a cutoff frequency determined in accordance with the encoded sampling rate for filtering the sampled approximation to reproduce the analog signal; and means for inhibiting the output of the filter when the analog signal to be reproduced is at substantially a zero level.
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