Patent EP0344615A2 successfully refreshed from Google Patents.
EP0344615A2
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EP
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Digital 2B1Q transmitter with high precision and linearity time domain response
Assignee: National Semiconductor Corp
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Filing: 1989-05-25
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Granted: —
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Expires: 2009-05-25
Abstract
Abstract A digital 2B1Q transmitter utilizes a dual modulator (18) to generate a 2B1Q coded output by summing two binary modulated vectors in a 2:1 weighting ratio, allowing one modulating envelope generator (22) to drive the dual modulator (18). The modulating envelope is coded in a 1-bit pulse density modulation (PDM) format, permitting the use of simple gating functions in performing the modulation function. The rising half of the transmit pulse is stored in the envelope generator (22), while the trailing half is derived from the rising half using the "1-x" function; this allows part of the summing functions to be reduced to OR gates.
Inventors
- 👤 Hee Wong
- 👤 Jesus A. Guinea
Bibliographic Details
Application Number
—
Jurisdiction
EP
Data Source
google_patents
Last Synchronized
2026-10-31 16:12
CPC Classifications
H; H04; H04L; H04L25/00; H04L25/38; H04L25/40; H04L25/49; H04L25/4917
Claims Analysis
Total Claims: 11
Claim 1
Independent Claim
59 words
In a digital transmitter that receives a dibit input and generates a 2B1O coded output, a dual modulator comprising: (a) means for modulating the dibit input to generate first and second binary modulated vectors; and (b) means for summing the first and second binary modulated vectors according to a 2:1 weighting ratio to generate the 2B1 Q coded output.
Claim 2
Dependent Claim
59 words
In a digital transmitter that receives a dibit input and generates a 2B1O coded output, a dual modulator comprising: (a) means for modulating the dibit input to generate first and second binary modulated vectors; and (b) means for summing the first and second binary modulated vectors according to a 2:1 weighting ratio to generate the 2B1 Q coded output.
Claim 3
Dependent Claim
39 words
A digital 2B1 Q transmitter as in claim 1 and further including an envelope generator connected to the dual modulator for providing a modulating envelope thereto, the modulating envelope being coded in a 1-bit pulse density modulation (PDM) format.
Claim 4
Dependent Claim
32 words
A digital 2B1Q transmitter as in claim 2 wherein the envelope generator generates the rising half of the modulating envelope and the dual modulator generates the trailing half of the modulating envelope.
Claim 5
Dependent Claim
29 words
A digital 281 Q transmitter as in claim 1 wherein the dual modulator includes code converter means for converting the 2B1 Q coded output to a 3-bit output signal.
Claim 6
Dependent Claim
19 words
A digital 2B1 Q transmitter as in claim 1 wherein the dual modulator comprises a programmable logic array (PLA).
Claim 7
Dependent Claim
27 words
A digital 2B1 Q transmitter as in claim 1 wherein the dual modulator includes convolution means for developing one symbol to occupy more than one baud period.
Claim 8
Dependent Claim
20 words
A digital 2B1Q transmitter as in claim 1 wherein the dual modulator includes soft muting means for providing gradual cut-off.
Claim 9
Dependent Claim
132 words
A digital transmitter that receives a dibit input and generates a 2B1Q coded output, the digital transmitter comprising (a) a dual modulator including means for modulating the dibit input to generate first and second binary modulated vectors and means for summing the first and second binary modulated vectors according to a 2:1 weighting ratio to develop a 2B1Q signal; (b) an envelope generator connected to the dual modulator for providing a 1-bit pulse density modulation (PDM) modulation envelope thereto; (c) a code converter for converting the 2B1 Q signal to a 3-bit signal; (d) a digital-to-analog converter for converting the 3-bit signal to an analog signal; (e) anti-alias filter means for removing high frequency components from the analog signal; and (f) a transmit output buffer which provides the 2B1 Q coded output.
Claim 10
Dependent Claim
132 words
A digital transmitter that receives a dibit input and generates a 2B1Q coded output, the digital transmitter comprising (a) a dual modulator including means for modulating the dibit input to generate first and second binary modulated vectors and means for summing the first and second binary modulated vectors according to a 2:1 weighting ratio to develop a 2B1Q signal; (b) an envelope generator connected to the dual modulator for providing a 1-bit pulse density modulation (PDM) modulation envelope thereto; (c) a code converter for converting the 2B1 Q signal to a 3-bit signal; (d) a digital-to-analog converter for converting the 3-bit signal to an analog signal; (e) anti-alias filter means for removing high frequency components from the analog signal; and (f) a transmit output buffer which provides the 2B1 Q coded output.
Claim 11
Dependent Claim
31 words
A digital transmitter as in claim 8 wherein the envelope generator generates the rising half of the modulating envelope and the dual modulator generates the trailing half of the modulating envelope.
References Cited (Backward Citations)
No citation records indexed.
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