Claims Analysis
Total Claims: 6
Claim 1
Independent Claim
62 words
A semiconductor memory having dynamic memory cells comprising: means (7,8,9,10,11,12,13) for determining whether or not it is necessary to refresh the dynamic memory cells, and only when it is necessary, output of a refresh execution signal in response to a refresh request signal from an external circuit; and means (13) for executing a refresh operation in response to said refresh execution signal.
Claim 2
Dependent Claim
62 words
A semiconductor memory having dynamic memory cells comprising: means (7,8,9,10,11,12,13) for determining whether or not it is necessary to refresh the dynamic memory cells, and only when it is necessary, output of a refresh execution signal in response to a refresh request signal from an external circuit; and means (13) for executing a refresh operation in response to said refresh execution signal.
Claim 3
Dependent Claim
64 words
A semiconductor memory according to claim 1, wherein said determining means (7,8) comprises timer means (7) for outputting a signal at every predetermined period, and flip-flop means (8) which is set by said signal from said timer means, receives said refresh request signal only under a set state thereof to generate said refresh execution signal, and is reset after completion of said refresh operation.
Claim 4
Dependent Claim
80 words
A semiconductor memory according to claim 1, wherein said determining means (7,9,10,11,12,13) comprises timer means (7) for generating a signal at every predetermined period, necessary-refresh-number storage means (9,11,12) for storing, as a necessary-refresh-number, the number of said signals output from said timer means (7) during the time when said refresh operation is not executed, and refresh execution determining means (10,13) for output of said refresh execution signals equal in number to said necessary-refresh-number in response to said refresh request signal.
Claim 5
Dependent Claim
44 words
A semiconductor memory according to claim 3, wherein said necessary-refresh-number storage means (9) includes an up/down counter which counts up said signal output from said timer means and counts down said refresh execution signal, the count value of said up/down counter being said necessary-refresh-number.
Claim 6
Dependent Claim
68 words
A semiconductor memory according to claim 3, wherein said necessary refresh number storage means (11,12) includes an up-counter (12) for counting up said signal output from said timer means (7) and a refresh address counter (11) which increments its address value upon execution of said refresh operation, a difference between the count value of said up-counter and the address value of said refresh address counter being said necessary-refresh-number.