Patent EP0323078B1 successfully refreshed from Google Patents.
EP0323078B1
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Electrically-programmable low-impedance anti-fuse element
Assignee: Microsemi SoC Corp
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Filing: 1988-12-14
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Granted: 2000-05-10
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Expires: 2008-12-14
Abstract
No abstract record available.
Inventors
- 👤 Esmat Zaghloul Hamdy
- 👤 John Lynn Mccollum
- 👤 Amr Mohamed Mohsen
Bibliographic Details
Application Number
—
Jurisdiction
EP
Data Source
google_patents
Last Synchronized
2026-11-07 21:33
CPC Classifications
H; H10; H10B; H10B20/00; H10W; H10W20/00; H10W20/40; H10W20/49; H10W20/491
Claims Analysis
Total Claims: 13
Claim 1
Independent Claim
87 words
An electrically-programmable, low-impedance antifuse element (13) disposed
in an integrated circuit, including: a first electrode (12a, b) comprising a region in the substrate (10) of said
integrated circuit containing arsenic at a concentration of between about 1x10 19 to
1x10 22 atoms/cm 3 ; a dielectric layer (14) disposed over said first electrode; and a second electrode (22a, 22b) comprising a layer of arsenic-containing
polysilicon disposed over said dielectric layer, wherein said region has the heaviest
concentration of arsenic at its interface with said dielectric layer (14).
Claim 2
Dependent Claim
28 words
An antifuse element according to claim 1 wherein the arsenic concentration of
said second electrode (22a, 22b) is between about 1x10 19 to 1x10 22 atoms/cm 3 .
Claim 3
Dependent Claim
19 words
An antifuse element according to claim 1 or 2 wherein said region (12a, 12b)
is ion implanted with arsenic.
Claim 4
Dependent Claim
26 words
An antifuse element according to claim 1, 2 or 3 wherein said dielectric layer
comprises a layer of silicon dioxide (16) disposed over said lower electrode.
Claim 5
Dependent Claim
25 words
An antifuse element according to claim 1, 2 or 3 wherein said dielectric layer
comprises a layer of silicon nitride disposed over said lower electrode.
Claim 6
Dependent Claim
40 words
An antifuse element according to claim 1, 2 or 3 wherein said dielectric layer
comprises a first layer of silicon dioxide (16) disposed over said lower electrode and
a second layer of silicon nitride (18) disposed over said first layer.
Claim 7
Dependent Claim
25 words
An antifuse element according to claim 6 wherein said dielectric layer further
comprises a third layer of silicon dioxide (20) disposed over said second layer.
Claim 8
Dependent Claim
73 words
An electrically-programmable, low-impedance antifuse element (36) disposed
in an integrated circuit, including: a first electrode (46) disposed on an insulating layer (42), said first electrode
comprising a layer of arsenic-containing polysilicon; a dielectric layer (48) disposed over said first electrode; and a second electrode (50) comprising a layer of arsenic-containing polysilicon
disposed over said dielectric layer; wherein the heaviest arsenic concentration of said first electrode is at its
interface with said dielectric layer.
Claim 9
Dependent Claim
26 words
An antifuse element according to claim 8 wherein the arsenic concentration in
said second electrode is between about 1x10 19 to 1x10 22 atoms/cm 3 .
Claim 10
Dependent Claim
24 words
An antifuse element according to claim 8 or 9 wherein said dielectric layer
comprises a layer of silicon dioxide disposed over said lower electrode.
Claim 11
Dependent Claim
25 words
An antifuse element according to claim 8 or 9 wherein said dielectric layer
(48) comprises a layer of silicon nitride disposed over said lower electrode.
Claim 12
Dependent Claim
37 words
An antifuse element according to claim 8 or 9 wherein said dielectric layer
comprises a first layer of silicon dioxide disposed over said lower electrode and a
second layer of silicon nitride disposed over said first layer.
Claim 13
Dependent Claim
24 words
An antifuse element according to claim 12 wherein said dielectric layer
further comprises a third layer of silicon dioxide disposed over said second layer.
References Cited (Backward Citations)
No citation records indexed.
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