Patent EP0317759A2 successfully refreshed from Google Patents.
EP0317759A2
Expired / Lapsed
EP
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Adjustable delay circuit
Assignee: Tektronix Inc
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Filing: 1988-10-18
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Granted: —
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Expires: 2008-10-18
Abstract
Abstract A delay element for producing an output signal in response to a change in state of an input signal includes variable gain first and second amplifiers (A1, A2) and a delay buffer (12) having a fixed delay. The input signal is applied as input to the first amplifier (A1) and the delay buffer (12) while the output of the delay buffer (12) is applied as input to the second amplifier (A2). The outputs of the first and second amplifiers are summed to provide the output signal. When the gain of the first amplifier (A1) is high and the gain of the second amplifier is low, the output signal will respond to the change in state of the input signal with minimum delay. When the gain of the first amplifier (A1) is low and the gain of the second amplifier (A2) is high, the output signal will respond to the change in state of the input signal with maximum delay. The delay in change of state of the output signal in response to a change of state in the input signal may be adjusted with high resolution to a time intermediate between the minimum and maximum delays by adjusting the gains of the first (A1) and second (A2) amplifiers.
Inventors
- 👤 Laszlo Janos Dobos
Bibliographic Details
Application Number
—
Jurisdiction
EP
Data Source
google_patents
Last Synchronized
2026-10-30 23:32
CPC Classifications
H; H03; H03K; H03K17/00; H03K17/51; H03K17/56; H03K17/60; H03K17/603; H03K17/62; H03K17/6257; H03K17/6264; H03K19/00; H03K19/003; H03K19/00323; H03K5/00; H03K5/13; H03K2005/00013; H03K2005/00019; H03K2005/00026; H03K2005/00052; H03K2005/0015; H03K2005/00163; H03K2005/00176; H03K2005/00182; H03K2005/00228
Claims Analysis
Total Claims: 20
Claim 1
Independent Claim
90 words
A method of producing an output signal that changes state in delayed response to a state change in an input signal, the method comprising the steps of: delaying the input signal to provide a delayed signal; applying the input signal as input to a first amplifier to provide a first signal in response to said input signal; applying the delayed signal as input to a second amplifier to provide a second signal in response to said delayed signal; and combining the first and second signals to produce said output signal.
Claim 2
Independent Claim
90 words
A method of producing an output signal that changes state in delayed response to a state change in an input signal, the method comprising the steps of: delaying the input signal to provide a delayed signal; applying the input signal as input to a first amplifier to provide a first signal in response to said input signal; applying the delayed signal as input to a second amplifier to provide a second signal in response to said delayed signal; and combining the first and second signals to produce said output signal.
Claim 3
Dependent Claim
26 words
A method according to claim 1, wherein the step of combining the first and second signals comprises the step of summing the first and second signals.
Claim 4
Dependent Claim
33 words
A method according to claim 1, wherein the step of delaying the input signal comprises the step of delaying the input signal by a fixed amount of time to provide said delayed signal.
Claim 5
Independent Claim
135 words
A method of producing an output signal that changes state in adjustably delayed response to a state change in an input signal, the method comprising the steps of: delaying the input signal to provide a delayed signal; applying the input signal as input to a first amplifier having an adjustable gain to provide a first signal in response to said input signal; applying the delayed signal as input to a second amplifier having an adjustable gain to provide a second signal in response to said delayed signal; and combining the first and second signals to produce said output signal; and adjusting a delay between said change in state of said output signal and said change in state of said input signal by adjusting the gain of at least one of said first and second amplifiers.
Claim 6
Independent Claim
135 words
A method of producing an output signal that changes state in adjustably delayed response to a state change in an input signal, the method comprising the steps of: delaying the input signal to provide a delayed signal; applying the input signal as input to a first amplifier having an adjustable gain to provide a first signal in response to said input signal; applying the delayed signal as input to a second amplifier having an adjustable gain to provide a second signal in response to said delayed signal; and combining the first and second signals to produce said output signal; and adjusting a delay between said change in state of said output signal and said change in state of said input signal by adjusting the gain of at least one of said first and second amplifiers.
Claim 7
Dependent Claim
48 words
A method according to claim 4, wherein the step of adjusting a delay comprises: adjusting the gain of the first amplifier; and adjusting the gain of the second amplifier, while holding constant a sum of the gain of the first amplifier and the gain of the second amplifier.
Claim 8
Dependent Claim
26 words
A method according to claim 4, wherein the step of combining the first and second signals comprises the step of summing the first and second signals.
Claim 9
Dependent Claim
33 words
A method according to claim 4, wherein the step of delaying the input signal comprises the step of delaying the input signal by a fixed amount of time to provide said delayed signal.
Claim 10
Dependent Claim
102 words
A delay circuit for producing an output signal that changes state in delayed response to a change in state of an input signal, the delay circuit comprising: means for providing a delayed signal that changes state in delayed response to a change in state of said input signal; first amplification means for receiving the input signal and for providing a first signal in response to said input signal; second amplification means for receiving the delayed signal and for providing a second signal in response to said delayed signal; and means for combining the first and second signals to provide the output signal.
Claim 11
Dependent Claim
102 words
A delay circuit for producing an output signal that changes state in delayed response to a change in state of an input signal, the delay circuit comprising: means for providing a delayed signal that changes state in delayed response to a change in state of said input signal; first amplification means for receiving the input signal and for providing a first signal in response to said input signal; second amplification means for receiving the delayed signal and for providing a second signal in response to said delayed signal; and means for combining the first and second signals to provide the output signal.
Claim 12
Dependent Claim
123 words
A delay circuit for producing an output signal that changes state in adjustably delayed response to a change in state of an input signal, the delay circuit comprising: means for providing a delayed signal that changes state in delayed response to a change in state of said input signal; first amplification means having adjustable first gain for receiving the input signal and for providing a first signal in response to said input signal; second amplification means having adjustable second gain for receiving the delayed signal and for providing a second signal in response to said delayed signal; means for combining the first and second signals to provide the output signal; and means for adjusting at least one of said first and second gains.
Claim 13
Dependent Claim
123 words
A delay circuit for producing an output signal that changes state in adjustably delayed response to a change in state of an input signal, the delay circuit comprising: means for providing a delayed signal that changes state in delayed response to a change in state of said input signal; first amplification means having adjustable first gain for receiving the input signal and for providing a first signal in response to said input signal; second amplification means having adjustable second gain for receiving the delayed signal and for providing a second signal in response to said delayed signal; means for combining the first and second signals to provide the output signal; and means for adjusting at least one of said first and second gains.
Claim 14
Dependent Claim
17 words
A delay circuit according to claim 9, wherein said combining means sums the first and second signals.
Claim 15
Dependent Claim
26 words
A delay circuit according to claim 9, wherein the response of said means for proving a delayed signal is delayed by a fixed amount of time.
Claim 16
Dependent Claim
45 words
A delay circuit according to claim 9, wherein said first amplification means has a first signal propagation time, said means for providing a delayed signal has a second signal propagation time, and the first signal propagation time is greater than the second signal propagation time.
Claim 17
Dependent Claim
309 words
A delay circuit for producing an output signal that changes state in adjustably delayed response to a change in state of a differential input signal, the delay circuit comprising: means for providing a differential delayed signal that changes state in delayed response to a change in state of said input signal; a first transistor having a first terminal, a second terminal, and a third terminal; a second transistor having a first terminal, a second terminal, and a third terminal wherein the input signal is applied across the first terminal of the first transistor and the first terminal of the second transistor, the second terminal of the first transistor is coupled to the second terminal of the second transistor, and a first differential current signal is provided at the third terminal of the first transistor and the third terminal of the second transistor; a third transistor having a first terminal, a second terminal, and a third terminal; a fourth transistor having a first terminal, a second terminal, and a third terminal wherein the delayed signal is applied across the first terminal of the third transistor and the first terminal of the fourth transistor, the second terminal of the third transistor is coupled to the second terminal of the fourth transistor, and a second differential current signal is provided at the third terminal of the third transistor and the third terminal of the fourth transistor; means for providing an adjustable first gain control current and an adjustable second gain control current, the first gain control current being applied at the second terminal of the first transistor and the second terminal of the second transistor, the second gain control current being applied at the second terminal of the third transistor and the second terminal of the fourth transistor; and means for combining the first and second signals to provide the output signal.
Claim 18
Dependent Claim
309 words
A delay circuit for producing an output signal that changes state in adjustably delayed response to a change in state of a differential input signal, the delay circuit comprising: means for providing a differential delayed signal that changes state in delayed response to a change in state of said input signal; a first transistor having a first terminal, a second terminal, and a third terminal; a second transistor having a first terminal, a second terminal, and a third terminal wherein the input signal is applied across the first terminal of the first transistor and the first terminal of the second transistor, the second terminal of the first transistor is coupled to the second terminal of the second transistor, and a first differential current signal is provided at the third terminal of the first transistor and the third terminal of the second transistor; a third transistor having a first terminal, a second terminal, and a third terminal; a fourth transistor having a first terminal, a second terminal, and a third terminal wherein the delayed signal is applied across the first terminal of the third transistor and the first terminal of the fourth transistor, the second terminal of the third transistor is coupled to the second terminal of the fourth transistor, and a second differential current signal is provided at the third terminal of the third transistor and the third terminal of the fourth transistor; means for providing an adjustable first gain control current and an adjustable second gain control current, the first gain control current being applied at the second terminal of the first transistor and the second terminal of the second transistor, the second gain control current being applied at the second terminal of the third transistor and the second terminal of the fourth transistor; and means for combining the first and second signals to provide the output signal.
Claim 19
Dependent Claim
59 words
A delay circuit according to claim 13, wherein said means for providing an adjustable first gain control current and an adjustable second gain control current comprises: a current source for providing a source current; and means for adjustably dividing the source between the first gain control current and the second gain control current in accordance with a control signal.
Claim 20
Dependent Claim
115 words
A delay circuit according to claim 14, wherein the control signal is a differential voltage signal and the means for adjustably dividing the source currrent comprises: a first resistor; a second resistor; a fifth transistor having a first terminal, a second terminal coupled to the current source through the first resistor, and a third terminal for providing the first gain control current; and a sixth transistor having a first terminal, a second terminal coupled to the currrent source through the second resistor, and a third terminal for providing the second gain control current, wherein the control signal is applied across the first terminal of the fifth transistor and the first terminal of the sixth transistor.
References Cited (Backward Citations)
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