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A bump electrode structure of a semiconductor device and a method for forming the same

Assignee: Casio Computer Co Ltd
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Filing: 1988-11-17
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Granted: —
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Expires: 2008-11-17
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Abstract

Abstract A bump electrode structure of a semiconductor device comprises an electrode pad (13) formed of an alu­minum alloy, an insulating oxide layer (14) covering only the peripheral edge portion of the electrode pad (13), an under-bump layer (15) formed of an alloy of titanium and tungsten, and a bump electrode (16) formed of gold. The titanium-tungsten alloy functions both as a barrier metal and as a bonding metal. The bump electrode (16) rises substantially straight from the bonding surface of the under-bump layer (15), and its top portion has an area only substantially equal to that of the electrode pad (13). Fine V-shaped grooves (17) are formed on the top surface of the bump electrode (16) by anisotropic etching. Thus, the semiconductor device with fine electrode pad pitches is provided with a high-­reliability bump electrode structure which ensures suf­ficient bonding strength between internal and external electrodes.

Inventors

  • 👤 Takeshi Pat. Dpt. Dev. Div Hamura R&D Wakabayashi
  • 👤 Akira Pat. Dpt. Dev. Div. Hamura R&D Suzuki
  • 👤 Shigeru Pat. Dpt. Dev. Div. Hamura R&D Yokoyama

Bibliographic Details

Application Number —
Jurisdiction EP
Data Source google_patents
Last Synchronized 2026-11-05 07:14
CPC Classifications
H; H10; H10W; H10W72/00; H10W72/01; H10W72/012; H10W72/20; H10W72/01231; H10W72/01233; H10W72/01235; H10W72/01251; H10W72/01253; H10W72/251; H10W72/252; H10W72/01255; H10W72/019; H10W72/01951; H10W72/01953; H10W72/231; H10W72/234; H10W72/29; H10W72/90; H10W72/921; H10W72/923; H10W72/951; H10W72/952; Y; Y10; Y10S; Y10S148/00; Y10S148/131

Claims Analysis

Total Claims: 20
Claim 1
Independent Claim 132 words
A bump electrode structure of a semiconductor device, characterized comprising: an electrode pad (13); an insulating layer (14) having an opening (14a) through which said electrode pad (13) is exposed and covering the peripheral edge portion of the electrode pad; an under-bump layer (15) bonded to the electrode pad (13) exposed through the opening of the insulating layer (14), said under-bump layer (15) having a single-­layer structure composed of an alloy of a barrier metal and a bonding metal, the peripheral edge portion of said under-bump layer (15) being situated between the respec­tive peripheral edge portions of the opening (14a) of the insulating layer (14) and the electrode (13); and a protuberant bump electrode (16) bonded to the under-bump (15) and raised from the peripheral edge portion of the under-bump layer (15).
Claim 2
Dependent Claim 132 words
A bump electrode structure of a semiconductor device, characterized comprising: an electrode pad (13); an insulating layer (14) having an opening (14a) through which said electrode pad (13) is exposed and covering the peripheral edge portion of the electrode pad; an under-bump layer (15) bonded to the electrode pad (13) exposed through the opening of the insulating layer (14), said under-bump layer (15) having a single-­layer structure composed of an alloy of a barrier metal and a bonding metal, the peripheral edge portion of said under-bump layer (15) being situated between the respec­tive peripheral edge portions of the opening (14a) of the insulating layer (14) and the electrode (13); and a protuberant bump electrode (16) bonded to the under-bump (15) and raised from the peripheral edge portion of the under-bump layer (15).
Claim 3
Dependent Claim 27 words
The bump electrode of a semiconductor device according to claim 1, characterized in that said under-­bump layer (15) is composed of an alloy of titanium and tungsten.
Claim 4
Dependent Claim 28 words
The bump electrode of a semiconductor device according to claim 2, characterized in that the titanium content of said under-bump layer (15) is approximately 30 % by weight.
Claim 5
Dependent Claim 23 words
The bump electrode of a semiconductor device according to claim 1, characterized in that said bump electrode (15) has a square cross section.
Claim 6
Independent Claim 204 words
A method for forming a bump electrode of a semiconductor device so that the bump electrode (16) protrudes from the upper surface of an electrode pad (13) whose central portion of is exposed through an opening (14a) of an insulating layer (14) and whose peripheral edge portion is covered by the insulating layer (14), said method characterized comprising: a process for forming an under-bump layer (15), composed of an alloy of a barrier metal and a bonding metal, on the insulating layer (14) and that portion of the electrode pad (13) exposed through the opening (14a) of the insulating layer (14); a process for forming a single photoresist layer (19) thicker than the bump electrode (16) on said under-­bump layer (15), and etching the photoresist layer to a size such that the peripheral edge portion of the pho­toresist layer (19) is situated between the respective peripheral edge portions of the opening (14a) of the insulating layer (14) and the electrode pad (13); and a process for forming the bump electrode (16) by plating through the etched portion of the photoresist layer (19) so that the top surface of the bump electrode (16) is flush with or lower than that of the photoresist layer (19).
Claim 7
Independent Claim 204 words
A method for forming a bump electrode of a semiconductor device so that the bump electrode (16) protrudes from the upper surface of an electrode pad (13) whose central portion of is exposed through an opening (14a) of an insulating layer (14) and whose peripheral edge portion is covered by the insulating layer (14), said method characterized comprising: a process for forming an under-bump layer (15), composed of an alloy of a barrier metal and a bonding metal, on the insulating layer (14) and that portion of the electrode pad (13) exposed through the opening (14a) of the insulating layer (14); a process for forming a single photoresist layer (19) thicker than the bump electrode (16) on said under-­bump layer (15), and etching the photoresist layer to a size such that the peripheral edge portion of the pho­toresist layer (19) is situated between the respective peripheral edge portions of the opening (14a) of the insulating layer (14) and the electrode pad (13); and a process for forming the bump electrode (16) by plating through the etched portion of the photoresist layer (19) so that the top surface of the bump electrode (16) is flush with or lower than that of the photoresist layer (19).
Claim 8
Dependent Claim 35 words
The method for forming a bump electrode of a semiconductor device according to claim 5, characterized in that said under-bump layer (15) is formed by sput­tering with use of an alloy of titanium and tungsten.
Claim 9
Dependent Claim 35 words
The method for forming a bump electrode of a semiconductor device according to claim 6, characterized in that said photoresist layer (19) is formed to a thickness of 20 to 30 µm by spin coating.
Claim 10
Dependent Claim 42 words
The method for forming a bump electrode of a semiconductor device according to claim 7, characterized in that said photoresist layer (19) has a viscosity of hundreds of centipoises to more than a thousand cen­tipoise at the time of the spin coating.
Claim 11
Dependent Claim 29 words
The method for forming a bump electrode of a semiconductor device according to claim 7, characterized in that said bump electrode (16) is thinner than the photoresist layer (19).
Claim 12
Dependent Claim 49 words
A bump electrode structure of a semiconductor device characterized in that a bump electrode (16) is bonded to an electrode pad (13) with an under-bump layer (15) therebetween, characterized in that fine V-shaped grooves (17) are formed on the top surface of said bump electrode (16) by anisotropic etching.
Claim 13
Dependent Claim 49 words
A bump electrode structure of a semiconductor device characterized in that a bump electrode (16) is bonded to an electrode pad (13) with an under-bump layer (15) therebetween, characterized in that fine V-shaped grooves (17) are formed on the top surface of said bump electrode (16) by anisotropic etching.
Claim 14
Independent Claim 102 words
A method for forming a bump electrode (16) of a semiconductor device, characterized by comprising: a process for forming an under-bump layer (15) over one entire face of the semiconductor device which has an electrode pad (13) and an insulating layer (14) covering the periphery of the electrode pad (13); a process for forming the bump electrode (16) on that portion of the under-bump layer (15) facing said electrode pad (13); and a reactive-ion (sputter) etching process for removing said under-bump layer (15) on the insulating layer (14) and forming fine V-shaped grooves (19) on the surface of the bump electrode (16).
Claim 15
Independent Claim 102 words
A method for forming a bump electrode (16) of a semiconductor device, characterized by comprising: a process for forming an under-bump layer (15) over one entire face of the semiconductor device which has an electrode pad (13) and an insulating layer (14) covering the periphery of the electrode pad (13); a process for forming the bump electrode (16) on that portion of the under-bump layer (15) facing said electrode pad (13); and a reactive-ion (sputter) etching process for removing said under-bump layer (15) on the insulating layer (14) and forming fine V-shaped grooves (19) on the surface of the bump electrode (16).
Claim 16
Dependent Claim 37 words
The method for forming a bump electrode (16) of a semiconductor device according to claim 11, charac­terized in that reactive ion gas used for said reactive-­ion etching is a gas mixture of halide gas and chlorine-based gas.
Claim 17
Dependent Claim 22 words
The method for forming a bump electrode of a semiconductor device according to claim 12, charac­terized in that said gas contains SF₆.
Claim 18
Dependent Claim 22 words
The method for forming a bump electrode of a semiconductor device according to claim 12, charac­terized in that said gas contains CFCl₃.
Claim 19
Dependent Claim 69 words
The method for forming a bump electrode (16) of a semiconductor device according to claim 11, charac­terized in that said bump electrode (16) forming process includes steps of applying a wet resist to the surface of the under-bump layer (15), forming an opening (14a) in that portion of the wet resist facing the electrode pad (13) by etching, and forming the bump electrode (16) inside the opening by plating.
Claim 20
Dependent Claim 46 words
The method for forming a bump electrode of a semiconductor device according to claim 15, charac­terized in that the outer peripheral edge of said opening (14a) is situated inside that of said electrode pad (13), and said bump electrode (16) is thinner than the wet resist.

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